From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Maulik Shah <maulik.shah@oss.qualcomm.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jishnu Prakash <quic_jprakash@quicinc.com>,
Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>,
Taniya Das <quic_tdas@quicinc.com>,
Melody Olvera <quic_molvera@quicinc.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, quic_lsrao@quicinc.com
Subject: Re: [PATCH v2] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
Date: Wed, 26 Feb 2025 18:55:11 +0100 [thread overview]
Message-ID: <137331ed-2f5c-47c4-99d9-e932673dca31@oss.qualcomm.com> (raw)
In-Reply-To: <20250226-sm8750_cluster_idle-v2-1-ef0ac81e242f@oss.qualcomm.com>
On 26.02.2025 7:51 AM, Maulik Shah wrote:
> SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
> cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
> and power domain in order to achieve complete domain sleep state.
>
> However only single cluster idle state is added mapping CPU 0-7 to the
> same power domain. Fix this by correctly mapping each CPU to respective
> cluster power domain and make cluster1 power domain use same domain idle
> state as cluster0 since both use same idle state parameters.
>
> Fixes: 068c3d3c83be ("arm64: dts: qcom: Add base SM8750 dtsi")
> Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2025-02-26 17:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 6:51 [PATCH v2] arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states Maulik Shah
2025-02-26 17:55 ` Konrad Dybcio [this message]
2025-03-14 20:00 ` Bjorn Andersson
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