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[Rohit Vaswani]

Date: Mon, 23 Sep 2013 19:51:25 -0700
Subject: [PATCH 1/3] ARM: debug: Create CONFIG_DEBUG_MSM_UART and re-organize
 the selects for MSM

Create the hidden config DEBUG_MSM_UART and clean-up the default selection
for CONFIG_DEBUG_LL_INCLUDE.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
 arch/arm/Kconfig.debug | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 9762c84..e18a6fc 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -318,6 +318,7 @@ choice
 	config DEBUG_MSM_UART1
 		bool "Kernel low-level debugging messages via MSM UART1"
 		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+		select DEBUG_MSM_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the first serial port on MSM devices.
@@ -325,6 +326,7 @@ choice
 	config DEBUG_MSM_UART2
 		bool "Kernel low-level debugging messages via MSM UART2"
 		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+		select DEBUG_MSM_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the second serial port on MSM devices.
@@ -332,6 +334,7 @@ choice
 	config DEBUG_MSM_UART3
 		bool "Kernel low-level debugging messages via MSM UART3"
 		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
+		select DEBUG_MSM_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the third serial port on MSM devices.
@@ -340,6 +343,7 @@ choice
 		bool "Kernel low-level debugging messages via MSM 8660 UART"
 		depends on ARCH_MSM8X60
 		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the serial port on MSM 8660 devices.
@@ -348,6 +352,7 @@ choice
 		bool "Kernel low-level debugging messages via MSM 8960 UART"
 		depends on ARCH_MSM8960
 		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
 		help
 		  Say Y here if you want the debug print routines to direct
 		  their output to the serial port on MSM 8960 devices.
@@ -880,6 +885,10 @@ config DEBUG_STI_UART
 	bool
 	depends on ARCH_STI
 
+config DEBUG_MSM_UART
+	bool
+	depends on ARCH_MSM
+
 config DEBUG_LL_INCLUDE
 	string
 	default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250
@@ -895,11 +904,7 @@ config DEBUG_LL_INCLUDE
 				 DEBUG_IMX53_UART ||\
 				 DEBUG_IMX6Q_UART || \
 				 DEBUG_IMX6SL_UART
-	default "debug/msm.S" if DEBUG_MSM_UART1 || \
-				 DEBUG_MSM_UART2 || \
-				 DEBUG_MSM_UART3 || \
-				 DEBUG_MSM8660_UART || \
-				 DEBUG_MSM8960_UART
+	default "debug/msm.S" if DEBUG_MSM_UART
 	default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
 	default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
 	default "debug/sti.S" if DEBUG_STI_UART
-- 
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hosted by The Linux Foundation

[PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Rohit Vaswani]

This patch adds basic board support for APQ8074 Dragonboard
which belongs to the Snapdragon 800 family.
For now, just support a basic machine with device tree.

Signed-off-by: Rohit Vaswani <rvaswani-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
---
 arch/arm/Kconfig.debug                         |  9 +++++++
 arch/arm/boot/dts/Makefile                     |  3 ++-
 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
 arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
 arch/arm/include/debug/msm.S                   |  5 ++++
 arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
 arch/arm/mach-msm/board-dt.c                   |  9 +++++++
 7 files changed, 79 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
 create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index e18a6fc..959b2c7 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -357,6 +357,15 @@ choice
 		  Say Y here if you want the debug print routines to direct
 		  their output to the serial port on MSM 8960 devices.
 
+	config DEBUG_MSM8974_UART
+		bool "Kernel low-level debugging messages via MSM 8974 UART"
+		depends on ARCH_MSM8974
+		select MSM_HAS_DEBUG_UART_HS
+		select DEBUG_MSM_UART
+		help
+		  Say Y here if you want the debug print routines to direct
+		  their output to the serial port on MSM 8974 devices.
+
 	config DEBUG_MVEBU_UART
 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
 		depends on ARCH_MVEBU
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 000cf76..e71a3ec 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
 	kirkwood-openblocks_a6.dtb
 dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
 dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
-	msm8960-cdp.dtb
+	msm8960-cdp.dtb \
+	qcom-apq8074-dragonboard.dtb
 dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
 	armada-370-mirabox.dtb \
 	armada-370-netgear-rn102.dtb \
diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
new file mode 100644
index 0000000..bb6f3c4
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
@@ -0,0 +1,6 @@
+/include/ "qcom-msm8974.dtsi"
+
+/ {
+	model = "Qualcomm APQ8074 Dragonboard";
+	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
+};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
new file mode 100644
index 0000000..f04b643
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -0,0 +1,35 @@
+/dts-v1/;
+
+/include/ "skeleton.dtsi"
+
+/ {
+	model = "Qualcomm MSM8974";
+	compatible = "qcom,msm8974";
+	interrupt-parent = <&intc>;
+
+	soc: soc { };
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	ranges;
+	compatible = "simple-bus";
+
+	intc: interrupt-controller@f9000000 {
+		compatible = "qcom,msm-qgic2";
+		interrupt-controller;
+		#interrupt-cells = <3>;
+		reg = <0xf9000000 0x1000>,
+		      <0xf9002000 0x1000>;
+	};
+
+	timer {
+		compatible = "arm,armv7-timer";
+		interrupts = <1 2 0xf08>,
+			     <1 3 0xf08>,
+			     <1 4 0xf08>,
+			     <1 1 0xf08>;
+		clock-frequency = <19200000>;
+	};
+};
diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
index 9166e1b..9d653d4 100644
--- a/arch/arm/include/debug/msm.S
+++ b/arch/arm/include/debug/msm.S
@@ -46,6 +46,11 @@
 #define MSM_DEBUG_UART_PHYS	0x16440000
 #endif
 
+#ifdef CONFIG_DEBUG_MSM8974_UART
+#define MSM_DEBUG_UART_BASE	0xFA71E000
+#define MSM_DEBUG_UART_PHYS	0xF991E000
+#endif
+
 	.macro	addruart, rp, rv, tmp
 #ifdef MSM_DEBUG_UART_PHYS
 	ldr	\rp, =MSM_DEBUG_UART_PHYS
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 2586c28..086bcb9 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -64,6 +64,19 @@ config ARCH_MSM_DT
 	select SPARSE_IRQ
 	select USE_OF
 
+config ARCH_MSM8974
+	bool "MSM8974"
+	select ARM_GIC
+	select CPU_V7
+	select HAVE_ARM_ARCH_TIMER
+	select HAVE_SMP
+	select MSM_SCM if SMP
+	select USE_OF
+
+config ARCH_MSM_DT
+	def_bool y
+	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
+
 config MSM_HAS_DEBUG_UART_HS
 	bool
 
diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
index 266a280..5211e80 100644
--- a/arch/arm/mach-msm/board-dt.c
+++ b/arch/arm/mach-msm/board-dt.c
@@ -26,7 +26,16 @@ static const char * const msm_dt_match[] __initconst = {
 	NULL
 };
 
+static const char * const apq8074_dt_match[] __initconst = {
+	"qcom,apq8074-dragonboard",
+	NULL
+};
+
 DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
 	.smp = smp_ops(msm_smp_ops),
 	.dt_compat = msm_dt_match,
 MACHINE_END
+
+DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
+	.dt_compat = apq8074_dt_match,
+MACHINE_END
-- 
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hosted by The Linux Foundation

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[PATCH 3/3] defconfig: msm_defconfig: Enable CONFIG_ARCH_MSM8974

[Rohit Vaswani]

This patch enables MSM8974 build support.

Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
---
 arch/arm/configs/msm_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig
index 690b5f9..0ed32e5 100644
--- a/arch/arm/configs/msm_defconfig
+++ b/arch/arm/configs/msm_defconfig
@@ -20,6 +20,7 @@ CONFIG_PARTITION_ADVANCED=y
 CONFIG_ARCH_MSM=y
 CONFIG_ARCH_MSM8X60=y
 CONFIG_ARCH_MSM8960=y
+CONFIG_ARCH_MSM8974=y
 CONFIG_SMP=y
 CONFIG_PREEMPT=y
 CONFIG_AEABI=y
-- 
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hosted by The Linux Foundation

Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Kumar Gala]

On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:

> This patch adds basic board support for APQ8074 Dragonboard
> which belongs to the Snapdragon 800 family.
> For now, just support a basic machine with device tree.
> 
> Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
> ---
> arch/arm/Kconfig.debug                         |  9 +++++++
> arch/arm/boot/dts/Makefile                     |  3 ++-
> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
> arch/arm/include/debug/msm.S                   |  5 ++++
> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
> 7 files changed, 79 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
> 
> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
> index e18a6fc..959b2c7 100644
> --- a/arch/arm/Kconfig.debug
> +++ b/arch/arm/Kconfig.debug
> @@ -357,6 +357,15 @@ choice
> 		  Say Y here if you want the debug print routines to direct
> 		  their output to the serial port on MSM 8960 devices.
> 
> +	config DEBUG_MSM8974_UART
> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
> +		depends on ARCH_MSM8974
> +		select MSM_HAS_DEBUG_UART_HS
> +		select DEBUG_MSM_UART
> +		help
> +		  Say Y here if you want the debug print routines to direct
> +		  their output to the serial port on MSM 8974 devices.
> +

A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.

> 	config DEBUG_MVEBU_UART
> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
> 		depends on ARCH_MVEBU
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index 000cf76..e71a3ec 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
> 	kirkwood-openblocks_a6.dtb
> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
> -	msm8960-cdp.dtb
> +	msm8960-cdp.dtb \
> +	qcom-apq8074-dragonboard.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
> 	armada-370-mirabox.dtb \
> 	armada-370-netgear-rn102.dtb \
> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> new file mode 100644
> index 0000000..bb6f3c4
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "qcom-msm8974.dtsi"
> +
> +/ {
> +	model = "Qualcomm APQ8074 Dragonboard";
> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "Qualcomm MSM8974";
> +	compatible = "qcom,msm8974";
> +	interrupt-parent = <&intc>;
> +
> +	soc: soc { };

We should have a unit address here:

	  soc: soc@FOOBAR {

also, split out the curly braces so any future patches do have to muck with that.

	};


> +};
> +
> +&soc {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	ranges;
> +	compatible = "simple-bus";
> +
> +	intc: interrupt-controller@f9000000 {
> +		compatible = "qcom,msm-qgic2";
> +		interrupt-controller;
> +		#interrupt-cells = <3>;
> +		reg = <0xf9000000 0x1000>,
> +		      <0xf9002000 0x1000>;
> +	};
> +
> +	timer {
> +		compatible = "arm,armv7-timer";
> +		interrupts = <1 2 0xf08>,
> +			     <1 3 0xf08>,
> +			     <1 4 0xf08>,
> +			     <1 1 0xf08>;
> +		clock-frequency = <19200000>;
> +	};
> +};
> diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
> index 9166e1b..9d653d4 100644
> --- a/arch/arm/include/debug/msm.S
> +++ b/arch/arm/include/debug/msm.S
> @@ -46,6 +46,11 @@
> #define MSM_DEBUG_UART_PHYS	0x16440000
> #endif
> 
> +#ifdef CONFIG_DEBUG_MSM8974_UART
> +#define MSM_DEBUG_UART_BASE	0xFA71E000
> +#define MSM_DEBUG_UART_PHYS	0xF991E000
> +#endif
> +
> 	.macro	addruart, rp, rv, tmp
> #ifdef MSM_DEBUG_UART_PHYS
> 	ldr	\rp, =MSM_DEBUG_UART_PHYS
> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
> index 2586c28..086bcb9 100644
> --- a/arch/arm/mach-msm/Kconfig
> +++ b/arch/arm/mach-msm/Kconfig
> @@ -64,6 +64,19 @@ config ARCH_MSM_DT
> 	select SPARSE_IRQ
> 	select USE_OF
> 
> +config ARCH_MSM8974
> +	bool "MSM8974"
> +	select ARM_GIC
> +	select CPU_V7
> +	select HAVE_ARM_ARCH_TIMER
> +	select HAVE_SMP
> +	select MSM_SCM if SMP
> +	select USE_OF
> +
> +config ARCH_MSM_DT
> +	def_bool y
> +	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
> +
> config MSM_HAS_DEBUG_UART_HS
> 	bool
> 
> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
> index 266a280..5211e80 100644
> --- a/arch/arm/mach-msm/board-dt.c
> +++ b/arch/arm/mach-msm/board-dt.c
> @@ -26,7 +26,16 @@ static const char * const msm_dt_match[] __initconst = {
> 	NULL
> };
> 
> +static const char * const apq8074_dt_match[] __initconst = {
> +	"qcom,apq8074-dragonboard",
> +	NULL
> +};
> +
> DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
> 	.smp = smp_ops(msm_smp_ops),
> 	.dt_compat = msm_dt_match,
> MACHINE_END
> +
> +DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
> +	.dt_compat = apq8074_dt_match,
> +MACHINE_END
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> hosted by The Linux Foundation
> 
> --
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-- 
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Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Rohit Vaswani]

On 9/25/2013 12:49 PM, Kumar Gala wrote:
> On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:
>
>> This patch adds basic board support for APQ8074 Dragonboard
>> which belongs to the Snapdragon 800 family.
>> For now, just support a basic machine with device tree.
>>
>> Signed-off-by: Rohit Vaswani <rvaswani-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>> ---
>> arch/arm/Kconfig.debug                         |  9 +++++++
>> arch/arm/boot/dts/Makefile                     |  3 ++-
>> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
>> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
>> arch/arm/include/debug/msm.S                   |  5 ++++
>> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
>> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
>> 7 files changed, 79 insertions(+), 1 deletion(-)
>> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
>>
>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>> index e18a6fc..959b2c7 100644
>> --- a/arch/arm/Kconfig.debug
>> +++ b/arch/arm/Kconfig.debug
>> @@ -357,6 +357,15 @@ choice
>> 		  Say Y here if you want the debug print routines to direct
>> 		  their output to the serial port on MSM 8960 devices.
>>
>> +	config DEBUG_MSM8974_UART
>> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
>> +		depends on ARCH_MSM8974
>> +		select MSM_HAS_DEBUG_UART_HS
>> +		select DEBUG_MSM_UART
>> +		help
>> +		  Say Y here if you want the debug print routines to direct
>> +		  their output to the serial port on MSM 8974 devices.
>> +
> A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.

Well, its good to have this as part of initial board setup for earlyprintk.

>
>> 	config DEBUG_MVEBU_UART
>> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
>> 		depends on ARCH_MVEBU
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index 000cf76..e71a3ec 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
>> 	kirkwood-openblocks_a6.dtb
>> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>> -	msm8960-cdp.dtb
>> +	msm8960-cdp.dtb \
>> +	qcom-apq8074-dragonboard.dtb
>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>> 	armada-370-mirabox.dtb \
>> 	armada-370-netgear-rn102.dtb \
>> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> new file mode 100644
>> index 0000000..bb6f3c4
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> @@ -0,0 +1,6 @@
>> +/include/ "qcom-msm8974.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm APQ8074 Dragonboard";
>> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> +	model = "Qualcomm MSM8974";
>> +	compatible = "qcom,msm8974";
>> +	interrupt-parent = <&intc>;
>> +
>> +	soc: soc { };
> We should have a unit address here:
>
> 	  soc: soc@FOOBAR {
>
> also, split out the curly braces so any future patches do have to muck with that.
>
> 	};
>

Im not sure I understand the reasoning behind the unit address for soc ?
>> +};
>> +
>> +&soc {
>> +	#address-cells = <1>;
>> +	#size-cells = <1>;
>> +	ranges;
>> +	compatible = "simple-bus";
>> +
>> +	intc: interrupt-controller@f9000000 {
>> +		compatible = "qcom,msm-qgic2";
>> +		interrupt-controller;
>> +		#interrupt-cells = <3>;
>> +		reg = <0xf9000000 0x1000>,
>> +		      <0xf9002000 0x1000>;
>> +	};
>> +
>> +	timer {
>> +		compatible = "arm,armv7-timer";
>> +		interrupts = <1 2 0xf08>,
>> +			     <1 3 0xf08>,
>> +			     <1 4 0xf08>,
>> +			     <1 1 0xf08>;
>> +		clock-frequency = <19200000>;
>> +	};
>> +};
>> diff --git a/arch/arm/include/debug/msm.S b/arch/arm/include/debug/msm.S
>> index 9166e1b..9d653d4 100644
>> --- a/arch/arm/include/debug/msm.S
>> +++ b/arch/arm/include/debug/msm.S
>> @@ -46,6 +46,11 @@
>> #define MSM_DEBUG_UART_PHYS	0x16440000
>> #endif
>>
>> +#ifdef CONFIG_DEBUG_MSM8974_UART
>> +#define MSM_DEBUG_UART_BASE	0xFA71E000
>> +#define MSM_DEBUG_UART_PHYS	0xF991E000
>> +#endif
>> +
>> 	.macro	addruart, rp, rv, tmp
>> #ifdef MSM_DEBUG_UART_PHYS
>> 	ldr	\rp, =MSM_DEBUG_UART_PHYS
>> diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
>> index 2586c28..086bcb9 100644
>> --- a/arch/arm/mach-msm/Kconfig
>> +++ b/arch/arm/mach-msm/Kconfig
>> @@ -64,6 +64,19 @@ config ARCH_MSM_DT
>> 	select SPARSE_IRQ
>> 	select USE_OF
>>
>> +config ARCH_MSM8974
>> +	bool "MSM8974"
>> +	select ARM_GIC
>> +	select CPU_V7
>> +	select HAVE_ARM_ARCH_TIMER
>> +	select HAVE_SMP
>> +	select MSM_SCM if SMP
>> +	select USE_OF
>> +
>> +config ARCH_MSM_DT
>> +	def_bool y
>> +	depends on (ARCH_MSM8X60 || ARCH_MSM8960 || ARCH_MSM8974)
>> +
>> config MSM_HAS_DEBUG_UART_HS
>> 	bool
>>
>> diff --git a/arch/arm/mach-msm/board-dt.c b/arch/arm/mach-msm/board-dt.c
>> index 266a280..5211e80 100644
>> --- a/arch/arm/mach-msm/board-dt.c
>> +++ b/arch/arm/mach-msm/board-dt.c
>> @@ -26,7 +26,16 @@ static const char * const msm_dt_match[] __initconst = {
>> 	NULL
>> };
>>
>> +static const char * const apq8074_dt_match[] __initconst = {
>> +	"qcom,apq8074-dragonboard",
>> +	NULL
>> +};
>> +
>> DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
>> 	.smp = smp_ops(msm_smp_ops),
>> 	.dt_compat = msm_dt_match,
>> MACHINE_END
>> +
>> +DT_MACHINE_START(APQ_DT, "Qualcomm MSM (Flattened Device Tree)")
>> +	.dt_compat = apq8074_dt_match,
>> +MACHINE_END
>> -- 
>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
>> hosted by The Linux Foundation
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in
>> the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
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Thanks,
Rohit Vaswani

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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Kumar Gala]

On Sep 25, 2013, at 5:35 PM, Rohit Vaswani wrote:

> On 9/25/2013 12:49 PM, Kumar Gala wrote:
>> On Sep 23, 2013, at 10:13 PM, Rohit Vaswani wrote:
>> 
>>> This patch adds basic board support for APQ8074 Dragonboard
>>> which belongs to the Snapdragon 800 family.
>>> For now, just support a basic machine with device tree.
>>> 
>>> Signed-off-by: Rohit Vaswani <rvaswani-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
>>> ---
>>> arch/arm/Kconfig.debug                         |  9 +++++++
>>> arch/arm/boot/dts/Makefile                     |  3 ++-
>>> arch/arm/boot/dts/qcom-apq8074-dragonboard.dts |  6 +++++
>>> arch/arm/boot/dts/qcom-msm8974.dtsi            | 35 ++++++++++++++++++++++++++
>>> arch/arm/include/debug/msm.S                   |  5 ++++
>>> arch/arm/mach-msm/Kconfig                      | 13 ++++++++++
>>> arch/arm/mach-msm/board-dt.c                   |  9 +++++++
>>> 7 files changed, 79 insertions(+), 1 deletion(-)
>>> create mode 100644 arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> create mode 100644 arch/arm/boot/dts/qcom-msm8974.dtsi
>>> 
>>> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
>>> index e18a6fc..959b2c7 100644
>>> --- a/arch/arm/Kconfig.debug
>>> +++ b/arch/arm/Kconfig.debug
>>> @@ -357,6 +357,15 @@ choice
>>> 		  Say Y here if you want the debug print routines to direct
>>> 		  their output to the serial port on MSM 8960 devices.
>>> 
>>> +	config DEBUG_MSM8974_UART
>>> +		bool "Kernel low-level debugging messages via MSM 8974 UART"
>>> +		depends on ARCH_MSM8974
>>> +		select MSM_HAS_DEBUG_UART_HS
>>> +		select DEBUG_MSM_UART
>>> +		help
>>> +		  Say Y here if you want the debug print routines to direct
>>> +		  their output to the serial port on MSM 8974 devices.
>>> +
>> A little surprised you didn't pull this and the ARCH_MSM8974 into its own patch outside of this patch being board support.
> 
> Well, its good to have this as part of initial board setup for earlyprintk.

I agree, just figured it would have been a standalone patch and a precursor to this patch.

>>> 	config DEBUG_MVEBU_UART
>>> 		bool "Kernel low-level debugging messages via MVEBU UART (old bootloaders)"
>>> 		depends on ARCH_MVEBU
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index 000cf76..e71a3ec 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -102,7 +102,8 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
>>> 	kirkwood-openblocks_a6.dtb
>>> dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
>>> dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
>>> -	msm8960-cdp.dtb
>>> +	msm8960-cdp.dtb \
>>> +	qcom-apq8074-dragonboard.dtb
>>> dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \
>>> 	armada-370-mirabox.dtb \
>>> 	armada-370-netgear-rn102.dtb \
>>> diff --git a/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> new file mode 100644
>>> index 0000000..bb6f3c4
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> @@ -0,0 +1,6 @@
>>> +/include/ "qcom-msm8974.dtsi"
>>> +
>>> +/ {
>>> +	model = "Qualcomm APQ8074 Dragonboard";
>>> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>>> +};
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> new file mode 100644
>>> index 0000000..f04b643
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -0,0 +1,35 @@
>>> +/dts-v1/;
>>> +
>>> +/include/ "skeleton.dtsi"
>>> +
>>> +/ {
>>> +	model = "Qualcomm MSM8974";
>>> +	compatible = "qcom,msm8974";
>>> +	interrupt-parent = <&intc>;
>>> +
>>> +	soc: soc { };
>> We should have a unit address here:
>> 
>> 	  soc: soc@FOOBAR {
>> 
>> also, split out the curly braces so any future patches do have to muck with that.
>> 
>> 	};
>> 
> 
> Im not sure I understand the reasoning behind the unit address for soc ?

Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.



>>> +};
>>> +
>>> +&soc {
>>> +	#address-cells = <1>;
>>> +	#size-cells = <1>;
>>> +	ranges;
>>> +	compatible = "simple-bus";
>>> +
>>> +	intc: interrupt-controller@f9000000 {
>>> +		compatible = "qcom,msm-qgic2";
>>> +		interrupt-controller;
>>> +		#interrupt-cells = <3>;
>>> +		reg = <0xf9000000 0x1000>,
>>> +		      <0xf9002000 0x1000>;
>>> +	};
>>> +
>>> +	timer {
>>> +		compatible = "arm,armv7-timer";
>>> +		interrupts = <1 2 0xf08>,
>>> +			     <1 3 0xf08>,
>>> +			     <1 4 0xf08>,
>>> +			     <1 1 0xf08>;
>>> +		clock-frequency = <19200000>;
>>> +	};
>>> +};

- k

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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Rohit Vaswani]

On 9/26/2013 9:37 AM, Kumar Gala wrote:
> <snip>

> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
> @@ -0,0 +1,6 @@
> +/include/ "qcom-msm8974.dtsi"
> +
> +/ {
> +	model = "Qualcomm APQ8074 Dragonboard";
> +	compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
> +};
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> new file mode 100644
> index 0000000..f04b643
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -0,0 +1,35 @@
> +/dts-v1/;
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> +	model = "Qualcomm MSM8974";
> +	compatible = "qcom,msm8974";
> +	interrupt-parent = <&intc>;
> +
> +	soc: soc { };
>>> We should have a unit address here:
>>>
>>> 	  soc: soc@FOOBAR {
>>>
>>> also, split out the curly braces so any future patches do have to muck with that.
>>>
>>> 	};
>>>
>> Im not sure I understand the reasoning behind the unit address for soc ?
> Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.
>
That still doesn't really answer anything :) - and I couldn't find any 
discussions about this either.
I don't see anybody in upstream adding an address to soc except sun.
What is that address supposed to be for - what does it mean ?
The soc is way of encapsulating meaningful blocks  for the particular SoC.

>
>>>> +};
>>>> +
>>>> +&soc {
>>>> +	#address-cells = <1>;
>>>> +	#size-cells = <1>;
>>>> +	ranges;
>>>> +	compatible = "simple-bus";
>>>> +
>>>> +	intc: interrupt-controller@f9000000 {
>>>> +		compatible = "qcom,msm-qgic2";
>>>> +		interrupt-controller;
>>>> +		#interrupt-cells = <3>;
>>>> +		reg = <0xf9000000 0x1000>,
>>>> +		      <0xf9002000 0x1000>;
>>>> +	};
>>>> +
>>>> +	timer {
>>>> +		compatible = "arm,armv7-timer";
>>>> +		interrupts = <1 2 0xf08>,
>>>> +			     <1 3 0xf08>,
>>>> +			     <1 4 0xf08>,
>>>> +			     <1 1 0xf08>;
>>>> +		clock-frequency = <19200000>;
>>>> +	};
>>>> +};
> - k
>


Thanks,
Rohit Vaswani

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Rohit Vaswani]

On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>> <snip>
>
>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>> @@ -0,0 +1,6 @@
>> +/include/ "qcom-msm8974.dtsi"
>> +
>> +/ {
>> +    model = "Qualcomm APQ8074 Dragonboard";
>> +    compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>> +};
>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi 
>> b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> new file mode 100644
>> index 0000000..f04b643
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>> @@ -0,0 +1,35 @@
>> +/dts-v1/;
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> +    model = "Qualcomm MSM8974";
>> +    compatible = "qcom,msm8974";
>> +    interrupt-parent = <&intc>;
>> +
>> +    soc: soc { };
>>>> We should have a unit address here:
>>>>
>>>>       soc: soc@FOOBAR {
>>>>
>>>> also, split out the curly braces so any future patches do have to 
>>>> muck with that.
>>>>
>>>>     };
>>>>
>>> Im not sure I understand the reasoning behind the unit address for 
>>> soc ?
>> Its fairly standard practice and there is a fair amount of discussion 
>> about the lack of a unit address for memory nodes.
>>
> That still doesn't really answer anything :) - and I couldn't find any 
> discussions about this either.
> I don't see anybody in upstream adding an address to soc except sun.
> What is that address supposed to be for - what does it mean ?
> The soc is way of encapsulating meaningful blocks  for the particular 
> SoC.

I see the mail from Stephen Warren for adding a check stating that

"ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
node that has a reg property must include a unit address in its name
with value matching the first entry in its reg property. Conversely, if
a node does not have a reg property, the node name must not include a
unit address."

The soc node we have does not have a reg property ?


>
>>
>>>>> +};
>>>>> +
>>>>> +&soc {
>>>>> +    #address-cells = <1>;
>>>>> +    #size-cells = <1>;
>>>>> +    ranges;
>>>>> +    compatible = "simple-bus";
>>>>> +
>>>>> +    intc: interrupt-controller@f9000000 {
>>>>> +        compatible = "qcom,msm-qgic2";
>>>>> +        interrupt-controller;
>>>>> +        #interrupt-cells = <3>;
>>>>> +        reg = <0xf9000000 0x1000>,
>>>>> +              <0xf9002000 0x1000>;
>>>>> +    };
>>>>> +
>>>>> +    timer {
>>>>> +        compatible = "arm,armv7-timer";
>>>>> +        interrupts = <1 2 0xf08>,
>>>>> +                 <1 3 0xf08>,
>>>>> +                 <1 4 0xf08>,
>>>>> +                 <1 1 0xf08>;
>>>>> +        clock-frequency = <19200000>;
>>>>> +    };
>>>>> +};
>> - k
>>
>
>
> Thanks,
> Rohit Vaswani
>


Thanks,
Rohit Vaswani

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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Kumar Gala]

On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:

> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>> <snip>
>> 
>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts
>>> @@ -0,0 +1,6 @@
>>> +/include/ "qcom-msm8974.dtsi"
>>> +
>>> +/ {
>>> +    model = "Qualcomm APQ8074 Dragonboard";
>>> +    compatible = "qcom,apq8074-dragonboard", "qcom,apq8074";
>>> +};
>>> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> new file mode 100644
>>> index 0000000..f04b643
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
>>> @@ -0,0 +1,35 @@
>>> +/dts-v1/;
>>> +
>>> +/include/ "skeleton.dtsi"
>>> +
>>> +/ {
>>> +    model = "Qualcomm MSM8974";
>>> +    compatible = "qcom,msm8974";
>>> +    interrupt-parent = <&intc>;
>>> +
>>> +    soc: soc { };
>>>>> We should have a unit address here:
>>>>> 
>>>>>      soc: soc@FOOBAR {
>>>>> 
>>>>> also, split out the curly braces so any future patches do have to muck with that.
>>>>> 
>>>>>    };
>>>>> 
>>>> Im not sure I understand the reasoning behind the unit address for soc ?
>>> Its fairly standard practice and there is a fair amount of discussion about the lack of a unit address for memory nodes.
>>> 
>> That still doesn't really answer anything :) - and I couldn't find any discussions about this either.
>> I don't see anybody in upstream adding an address to soc except sun.
>> What is that address supposed to be for - what does it mean ?
>> The soc is way of encapsulating meaningful blocks  for the particular SoC.
> 
> I see the mail from Stephen Warren for adding a check stating that
> 
> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
> node that has a reg property must include a unit address in its name
> with value matching the first entry in its reg property. Conversely, if
> a node does not have a reg property, the node name must not include a
> unit address."
> 
> The soc node we have does not have a reg property ?

Not 100% sure what people will decide on this.  There are a number of examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR, but they don't typically have "reg" properties at the soc level.

Let's go ahead w/o the unit address (as you have it) for now.

- k

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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[David Brown]

On Thu, Sep 26, 2013 at 02:33:53PM -0500, Kumar Gala wrote:

>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
>> node that has a reg property must include a unit address in its name
>> with value matching the first entry in its reg property. Conversely, if
>> a node does not have a reg property, the node name must not include a
>> unit address."
>>
>> The soc node we have does not have a reg property ?
>
>Not 100% sure what people will decide on this.  There are a number of
>examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>but they don't typically have "reg" properties at the soc level.
>
>Let's go ahead w/o the unit address (as you have it) for now.

What is the address even supposed to mean?  Are we expecting multiple
'soc' nodes?

David
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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Kumar Gala]

On Sep 26, 2013, at 3:58 PM, David Brown wrote:

> On Thu, Sep 26, 2013 at 02:33:53PM -0500, Kumar Gala wrote:
> 
>>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that any
>>> node that has a reg property must include a unit address in its name
>>> with value matching the first entry in its reg property. Conversely, if
>>> a node does not have a reg property, the node name must not include a
>>> unit address."
>>> 
>>> The soc node we have does not have a reg property ?
>> 
>> Not 100% sure what people will decide on this.  There are a number of
>> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>> but they don't typically have "reg" properties at the soc level.
>> 
>> Let's go ahead w/o the unit address (as you have it) for now.
> 
> What is the address even supposed to mean?  Are we expecting multiple
> 'soc' nodes?


What do we consider to exist under soc in general?  I'd expect the address to be the base of the MMIO register register for on SoC devices (but that's based on my PPC history).

- k

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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Rob Herring]

On 09/26/2013 02:33 PM, Kumar Gala wrote:
> 
> On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:
> 
>> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>>> <snip>
>>> 
>>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -0,0
>>>> +1,6 @@ +/include/ "qcom-msm8974.dtsi" + +/ { +    model =
>>>> "Qualcomm APQ8074 Dragonboard"; +    compatible =
>>>> "qcom,apq8074-dragonboard", "qcom,apq8074"; +}; diff --git
>>>> a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi new file mode 100644 
>>>> index 0000000..f04b643 --- /dev/null +++
>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -0,0 +1,35 @@ 
>>>> +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { +    model =
>>>> "Qualcomm MSM8974"; +    compatible = "qcom,msm8974"; +
>>>> interrupt-parent = <&intc>; + +    soc: soc { };
>>>>>> We should have a unit address here:
>>>>>> 
>>>>>> soc: soc@FOOBAR {
>>>>>> 
>>>>>> also, split out the curly braces so any future patches do
>>>>>> have to muck with that.
>>>>>> 
>>>>>> };
>>>>>> 
>>>>> Im not sure I understand the reasoning behind the unit
>>>>> address for soc ?
>>>> Its fairly standard practice and there is a fair amount of
>>>> discussion about the lack of a unit address for memory nodes.
>>>> 
>>> That still doesn't really answer anything :) - and I couldn't
>>> find any discussions about this either. I don't see anybody in
>>> upstream adding an address to soc except sun. What is that
>>> address supposed to be for - what does it mean ? The soc is way
>>> of encapsulating meaningful blocks  for the particular SoC.
>> 
>> I see the mail from Stephen Warren for adding a check stating that
>> 
>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that
>> any node that has a reg property must include a unit address in its
>> name with value matching the first entry in its reg property.
>> Conversely, if a node does not have a reg property, the node name
>> must not include a unit address."
>> 
>> The soc node we have does not have a reg property ?
> 
> Not 100% sure what people will decide on this.  There are a number of
> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
> but they don't typically have "reg" properties at the soc level.

No, but you may have a ranges property which is related.

I've just hit this on highbank in needing to add a second bank of
peripherals for midway. So my vote would be to have unit address.

Rob
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Re: [PATCHv4 2/3] ARM: msm: Add support for APQ8074 Dragonboard

[Kumar Gala]

On Sep 26, 2013, at 4:10 PM, Rob Herring wrote:

> On 09/26/2013 02:33 PM, Kumar Gala wrote:
>> 
>> On Sep 26, 2013, at 2:17 PM, Rohit Vaswani wrote:
>> 
>>> On 9/26/2013 11:05 AM, Rohit Vaswani wrote:
>>>> On 9/26/2013 9:37 AM, Kumar Gala wrote:
>>>>> <snip>
>>>> 
>>>>> +++ b/arch/arm/boot/dts/qcom-apq8074-dragonboard.dts @@ -0,0
>>>>> +1,6 @@ +/include/ "qcom-msm8974.dtsi" + +/ { +    model =
>>>>> "Qualcomm APQ8074 Dragonboard"; +    compatible =
>>>>> "qcom,apq8074-dragonboard", "qcom,apq8074"; +}; diff --git
>>>>> a/arch/arm/boot/dts/qcom-msm8974.dtsi
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi new file mode 100644 
>>>>> index 0000000..f04b643 --- /dev/null +++
>>>>> b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -0,0 +1,35 @@ 
>>>>> +/dts-v1/; + +/include/ "skeleton.dtsi" + +/ { +    model =
>>>>> "Qualcomm MSM8974"; +    compatible = "qcom,msm8974"; +
>>>>> interrupt-parent = <&intc>; + +    soc: soc { };
>>>>>>> We should have a unit address here:
>>>>>>> 
>>>>>>> soc: soc@FOOBAR {
>>>>>>> 
>>>>>>> also, split out the curly braces so any future patches do
>>>>>>> have to muck with that.
>>>>>>> 
>>>>>>> };
>>>>>>> 
>>>>>> Im not sure I understand the reasoning behind the unit
>>>>>> address for soc ?
>>>>> Its fairly standard practice and there is a fair amount of
>>>>> discussion about the lack of a unit address for memory nodes.
>>>>> 
>>>> That still doesn't really answer anything :) - and I couldn't
>>>> find any discussions about this either. I don't see anybody in
>>>> upstream adding an address to soc except sun. What is that
>>>> address supposed to be for - what does it mean ? The soc is way
>>>> of encapsulating meaningful blocks  for the particular SoC.
>>> 
>>> I see the mail from Stephen Warren for adding a check stating that
>>> 
>>> "ePAPR 1.1 section 2.2.1.1 "Node Name Requirements" specifies that
>>> any node that has a reg property must include a unit address in its
>>> name with value matching the first entry in its reg property.
>>> Conversely, if a node does not have a reg property, the node name
>>> must not include a unit address."
>>> 
>>> The soc node we have does not have a reg property ?
>> 
>> Not 100% sure what people will decide on this.  There are a number of
>> examples on the PPC side (arch/powerpc/boot/dts) that are soc@ADDR,
>> but they don't typically have "reg" properties at the soc level.
> 
> No, but you may have a ranges property which is related.
> 
> I've just hit this on highbank in needing to add a second bank of
> peripherals for midway. So my vote would be to have unit address.
> 
> Rob

So are we saying the rule for needing a unit-address being either 'reg' or 'ranges' ?

- k

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(unknown)

[MRS GRACE MANDA]

[-- Attachment #1: Type: text/plain, Size: 71 bytes --]









This is Mrs Grace Manda (  Please I need your Help is Urgent). 

[-- Attachment #2: Mrs Grace Manda.rtf --]
[-- Type: application/rtf, Size: 35796 bytes --]

(unknown)

[julien.parvole]

Greetings,

I hope this proposal meets you in a good state of health.

Please can you help me re-profile fund? I am Mr Nobuyuki Hirano,  
President and CEO of The Bank of Tokyo-Mitsubishi UFJ. A sum of Twenty  
three million, two Hundred Thousand dollars  was deposited by my Late  
customer (Fadel Ahmed) who died without declaring any next of kin  
before his death in 2009.

My suggestion to you is to stand as the next of kin to Fadel Ahmed. We  
shall share in the ratio of 50% for me, 50% for you. Please contact me  
via this e- mail: mr.nobuyukihirano@foxmail.com thanks.

Sincerely,
Mr. Nobuyuki Hirano

(unknown),

[Neil Armstrong]

Subject: [PATCH v3 0/4] Add support for the Qualcomm PM8018 PMIC

In order to support the Qualcomm MDM9615 in the Sierra Wireless WP8548
Modules, add the PM8018 PMIC support into MFD, Regulator, RTC and input.

This patchset is part of a global SoC + Module + Board support for the
Sierra Wireless mangOH Board support with the WP8548 module.

Patch "mfd: qcom-rpm: Add support for pm8018 RPM Regulator" depends on :
 - "fix offset error for msm8660" at http://lkml.kernel.org/r/1465897725-16213-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org
 - "parametrize also ack selector size" at http://lkml.kernel.org/r/1466576837-21995-1-git-send-email-linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org

Changes since v2 at http://lkml.kernel.org/r/1466759887-25394-1-git-send-email-narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org :
 - Dropped pwrkey changes

Changes since v1 at http://lkml.kernel.org/r/1466158929-19524-1-git-send-email-narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org :
 - Rebase mfd/qcom_rpm.c on top of Linus "fix offset error for msm8660" and "parametrize also ack selector size" patches
 - Rename QCOM_RPM_NCP in to QCOM_RPM_PM8018_NCP
 - Rebased qcom-rpm.h PM8018 defines numbers without a gap
 - Dropped regulator corner

Neil Armstrong (4):
  mfd: pm8921: Add support for pm8018
  rtc: rtc-pm8xxx: Add support for pm8018 rtc
  mfd: qcom-rpm: Add support for pm8018 RPM Regulator
  regulator: qcom_rpm-regulator: Add support for pm8018 rpm regulator

 .../devicetree/bindings/mfd/qcom-pm8xxx.txt        |   1 +
 Documentation/devicetree/bindings/mfd/qcom-rpm.txt |  15 ++++
 drivers/mfd/pm8921-core.c                          |   1 +
 drivers/mfd/qcom_rpm.c                             |  51 +++++++++++
 drivers/regulator/qcom_rpm-regulator.c             | 100 +++++++++++++++++++++
 drivers/rtc/rtc-pm8xxx.c                           |  11 +++
 include/dt-bindings/mfd/qcom-rpm.h                 |  22 +++++
 7 files changed, 201 insertions(+)

-- 
1.9.1

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(unknown),

[Iaroslav Gridin]

This set of patches fixes QCE digest code, preventing lockups and incorrect results.

(unknown),

[Andy Gross]

Subject: [Patch v5 0/2] Support ARM SMCC SoC vendor quirks

At least one SoC vendor (Qualcomm) requires additional processing done
during ARM SMCCC calls.  As such, an additional parameter to the
arm_smccc_smc is required to be able to handle SoC specific quirks.

The Qualcomm quirk is necessary due to the fact that the scm call can
be interrupted on Qualcomm ARM64 platforms.  When this occurs, the
call must be restarted using information that was passed back during
the original smc call.

The first patch in this series adds a quirk structure and also adds a
quirk parameter to arm_smccc_smc calls.  I added macros to allow users
to choose the API they need.  This keeps all of the current users who
do not need quirks from having to change anything.

The second patch adds the Qualcomm quirk and also implements the
Qualcomm firmware changes required to handle the restarting of the
interrupted SMC call.

The original patch set for the SMCCC session ID is located at:
https://lkml.org/lkml/2016/8/20/7

Changes from v4:
  - Fix issue with hvc calls.

Changes from v3:
  - Fix documentation

Changes from v2:
  - Use variadic macros

Changes from v1:
  - Add macros to handle both use cases per review comments

Andy Gross (2):
  arm: kernel: Add SMC structure parameter
  firmware: qcom: scm: Fix interrupted SCM calls

 arch/arm/kernel/armksyms.c      |  2 +-
 arch/arm/kernel/smccc-call.S    |  7 ++++---
 arch/arm64/kernel/arm64ksyms.c  |  2 +-
 arch/arm64/kernel/asm-offsets.c |  7 +++++--
 arch/arm64/kernel/smccc-call.S  | 22 ++++++++++++++++------
 drivers/firmware/qcom_scm-64.c  | 13 ++++++++++---
 include/linux/arm-smccc.h       | 38 +++++++++++++++++++++++++++++++-------
 7 files changed, 68 insertions(+), 23 deletions(-)

-- 
1.9.1

(unknown),

[Youichi Kanno]

Sir/Madam

I am sorry to encroach into your privacy in this manner, I found you  
listed in the Trade Center Chambers of Commerce directory here in  
Japan, My name is Youichi Kanno and I work in Audit & credit  
Supervisory role at The Norinchukin Bank, I need your assistance to  
process the fund claims oF $18,100,000.00 (Eighteen Million, One  
Hundred Thousand, USD) of a deceased client Mr. Grigor Kassan, And i  
need your assistance to process the fund claims, I only pray at this  
time that your address is still valid. I want to solicit your  
attention to receive this money on my behalf. The purpose of my  
contacting you is because my status would not permit me to do this  
alone.


I hope to hear from you soon so we can discuss the logistic of moving
the funds to a safe offshore bank.

Yours sincerely,
Youichi Kanno
Phone Number: +81345400962