From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephane Viau Subject: [PATCH v3 0/4] drm/msm: preparation for WB/DSI connectors Date: Fri, 13 Mar 2015 15:49:30 -0400 Message-ID: <1426276174-17010-1-git-send-email-sviau@codeaurora.org> References: Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:60156 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751265AbbCMTto (ORCPT ); Fri, 13 Mar 2015 15:49:44 -0400 In-Reply-To: Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: dri-devel@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, robdclark@gmail.com, Stephane Viau WB and DSI support are in the pipe and will come out soon. Before that, we need to prepare the MDP5 driver so we can support these connectors. v2: rename macro to mdp5_cfg_intf_is_virtual() [pointed by Archit] v3: add sanity check before writing in INTF_TIMING_ENGINE_EN registers Note: "drm/msm: Add display configuration for msm8x16" patch set depends on "drm/msm: preparation for WB/DSI connectors" patch set. Stephane Viau (4): drm/msm/mdp5: Update generated header files drm/msm/mdp5: Enhance operation mode for pipeline configuration drm/msm/mdp5: Add START signal to kick off certain pipelines drm/msm/mdp5: Make the intf connection in config module drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h | 68 +++--- drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.c | 10 + drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 15 +- drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 70 ++---- drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c | 326 +++++++++++++++++++++++++--- drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h | 75 +++---- drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 40 ++-- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 100 +++++---- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 49 ++++- 9 files changed, 522 insertions(+), 231 deletions(-) -- Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project