From mboxrd@z Thu Jan 1 00:00:00 1970 From: Archit Taneja Subject: [PATCH v3 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Date: Mon, 3 Aug 2015 10:38:17 +0530 Message-ID: <1438578498-32254-5-git-send-email-architt@codeaurora.org> References: <1421419702-17812-1-git-send-email-architt@codeaurora.org> <1438578498-32254-1-git-send-email-architt@codeaurora.org> Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:59687 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752735AbbHCFIm (ORCPT ); Mon, 3 Aug 2015 01:08:42 -0400 In-Reply-To: <1438578498-32254-1-git-send-email-architt@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: linux-mtd@lists.infradead.org, dehrenberg@google.com, cernekee@gmail.com, computersforpeace@gmail.com Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org, sboyd@codeaurora.org, linux-kernel@vger.kernel.org, Archit Taneja , devicetree@vger.kernel.org The nand controller in IPQ806x is of the 'EBI2 type'. Use the corresponding compatible string. Cc: devicetree@vger.kernel.org Reviewed-by: Andy Gross Signed-off-by: Archit Taneja --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 1e1b3f0..a7f0ee5 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -350,5 +350,20 @@ status = "disabled"; }; + nand@1ac00000 { + compatible = "qcom,ebi2-nandc"; + reg = <0x1ac00000 0x800>; + + clocks = <&gcc EBI2_CLK>, + <&gcc EBI2_AON_CLK>; + clock-names = "core", "aon"; + + dmas = <&adm_dma 3>; + dma-names = "rxtx"; + qcom,cmd-crci = <15>; + qcom,data-crci = <3>; + + status = "disabled"; + }; }; }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation