From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ivan T. Ivanov" Subject: Re: [PATCH] spmi-pmic-arb: support configurable number of peripherals Date: Tue, 15 Sep 2015 14:20:18 +0300 Message-ID: <1442316018.15519.4.camel@mm-sol.com> References: <1442267672-11287-1-git-send-email-sboyd@codeaurora.org> <55F77451.9070900@codeaurora.org> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=-yf9DXGtSU7Tuw+po1+kK" Return-path: Received: from ns.mm-sol.com ([37.157.136.199]:47497 "EHLO extserv.mm-sol.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752492AbbIOLUd (ORCPT ); Tue, 15 Sep 2015 07:20:33 -0400 In-Reply-To: <55F77451.9070900@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Stephen Boyd Cc: Greg Kroah-Hartman , linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gilad Avidov , Sagar Dharia --=-yf9DXGtSU7Tuw+po1+kK Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit On Mon, 2015-09-14 at 18:28 -0700, Stephen Boyd wrote: > On 09/14/2015 02:54 PM, Stephen Boyd wrote: > > The current driver implementation supports only 128 peripherals. > > Add support for more than 128 peripherals by taking a lazy > > caching approach to the mapping tables. Instead of reading the > > tables at boot given some fixed size, read them on an as needed > > basis and cache the results. We still assume a max number of 512 > > peripherals, trading off some space for simplicity. > > > > Based on a patch by Gilad Avidov and > > Sagar Dharia . > > > > Signed-off-by: Stephen Boyd > > --- > > Hi Ivan, > > This patch causes 8916 to crash, because there isn't a mapping for ppid > 257 in the ppid to channel table. It seems that we're reading the revid > from the slave id 1 pmic by going through channel 0, which seems to be > setup for ppid 9 (slave id 0 and the peripheral starting at 0x900). Can > we stop reading the revid registers from non-zero slave id pmic devices? > That would be one solution to fix this problem. Or maybe we need to > special case this in the pmic arbiter code to fold ppid 0xN01 (slave id > N and address 0x100) onto channel 0 all the time? > Yes, we can. We are not using this information at the moment. Right now, revision read is more or less for debug purposes. Would following patch work for you? Of course it will be difficult to guaranties that some other driver misbehave and touch non-existing register, right? Regards, Ivan --=-yf9DXGtSU7Tuw+po1+kK Content-Disposition: attachment; filename*0=0001-mfd-qcom-spmi-pmic-Do-not-access-non-existing-regist.pat; filename*1=ch Content-Type: text/x-patch; name="0001-mfd-qcom-spmi-pmic-Do-not-access-non-existing-regist.patch"; charset="UTF-8" Content-Transfer-Encoding: base64 RnJvbSBkN2M5YzU5YjcxMzRmMDkzY2YzZjgyOTgzMmY0Zjc3NzFhNjU2NjRlIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiAiSXZhbiBULiBJdmFub3YiIDxpdmFuLml2YW5vdkBsaW5hcm8u b3JnPgpEYXRlOiBUdWUsIDE1IFNlcCAyMDE1IDA5OjQzOjEwICswMzAwClN1YmplY3Q6IFtQQVRD SF0gbWZkOiBxY29tLXNwbWktcG1pYzogRG8gbm90IGFjY2VzcyBub24gZXhpc3RpbmcgcmVnaXN0 ZXJzCkNjOiBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnCgpSZXZpc2lvbiBJRCByZWdpc3Rl cnMgYXJlIGF2YWlsYWJsZSBvbmx5IG9uIGRldmljZXMgd2l0aApTbGF2ZSBJRCBaZXJvLCBzbyBk b24ndCBtYWtlIGFjY2VzcyB0byB1bmF2YWlsYWJsZSByZWdpc3RlcnMuCgpTaWduZWQtb2ZmLWJ5 OiBJdmFuIFQuIEl2YW5vdiA8aXZhbi5pdmFub3ZAbGluYXJvLm9yZz4KLS0tCiBkcml2ZXJzL21m ZC9xY29tLXNwbWktcG1pYy5jIHwgMTIgKysrKysrKysrKystCiAxIGZpbGUgY2hhbmdlZCwgMTEg aW5zZXJ0aW9ucygrKSwgMSBkZWxldGlvbigtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvbWZkL3Fj b20tc3BtaS1wbWljLmMgYi9kcml2ZXJzL21mZC9xY29tLXNwbWktcG1pYy5jCmluZGV4IGFmNmFj MWM0YjQ1Yy4uZDdhZDcyYWY1NjgyIDEwMDY0NAotLS0gYS9kcml2ZXJzL21mZC9xY29tLXNwbWkt cG1pYy5jCisrKyBiL2RyaXZlcnMvbWZkL3Fjb20tc3BtaS1wbWljLmMKQEAgLTEyMiwxMiArMTIy LDIyIEBAIHN0YXRpYyBpbnQgcG1pY19zcG1pX3Byb2JlKHN0cnVjdCBzcG1pX2RldmljZSAqc2Rl dikKIHsKIAlzdHJ1Y3QgZGV2aWNlX25vZGUgKnJvb3QgPSBzZGV2LT5kZXYub2Zfbm9kZTsKIAlz dHJ1Y3QgcmVnbWFwICpyZWdtYXA7CisJdTMyIHNpZDsKKwlpbnQgcmV0OworCisJcmV0ID0gb2Zf cHJvcGVydHlfcmVhZF91MzIocm9vdCwgInJlZyIsICZzaWQpOworCWlmIChyZXQgPCAwKSB7CisJ CWRldl9lcnIoJnNkZXYtPmRldiwgIk1pc3NpbmcgU0lEXG4iKTsKKwkJcmV0dXJuIHJldDsKKwl9 CiAKIAlyZWdtYXAgPSBkZXZtX3JlZ21hcF9pbml0X3NwbWlfZXh0KHNkZXYsICZzcG1pX3JlZ21h cF9jb25maWcpOwogCWlmIChJU19FUlIocmVnbWFwKSkKIAkJcmV0dXJuIFBUUl9FUlIocmVnbWFw KTsKIAotCXBtaWNfc3BtaV9zaG93X3JldmlkKHJlZ21hcCwgJnNkZXYtPmRldik7CisJLyogT25s eSBkZXZpY2VzIHdpdGggU2xhdmUgSUQgWmVybyBjb250YWluIHRoaXMgaW5mb3JtYXRpb24gKi8K KwlpZiAoc2lkID09IDApCisJCXBtaWNfc3BtaV9zaG93X3JldmlkKHJlZ21hcCwgJnNkZXYtPmRl dik7CiAKIAlyZXR1cm4gb2ZfcGxhdGZvcm1fcG9wdWxhdGUocm9vdCwgTlVMTCwgTlVMTCwgJnNk ZXYtPmRldik7CiB9Ci0tIAoxLjkuMQoK --=-yf9DXGtSU7Tuw+po1+kK--