* [PATCH] clk: qcom: msm8960: Fix ce3_src register offset
@ 2016-03-02 1:30 Stephen Boyd
2016-03-02 9:35 ` Srinivas Kandagatla
0 siblings, 1 reply; 2+ messages in thread
From: Stephen Boyd @ 2016-03-02 1:30 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd
Cc: linux-kernel, linux-clk, linux-arm-msm, Bjorn Andersson,
Srinivas Kandagatla
The offset seems to have been copied from the sata clk. Fix it so
that enabling the crypto engine source clk works.
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
---
drivers/clk/qcom/gcc-msm8960.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index 63ecd97f3793..0a0c1f533249 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -2753,7 +2753,7 @@ static struct clk_rcg ce3_src = {
},
.freq_tbl = clk_tbl_ce3,
.clkr = {
- .enable_reg = 0x2c08,
+ .enable_reg = 0x36c0,
.enable_mask = BIT(7),
.hw.init = &(struct clk_init_data){
.name = "ce3_src",
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] clk: qcom: msm8960: Fix ce3_src register offset
2016-03-02 1:30 [PATCH] clk: qcom: msm8960: Fix ce3_src register offset Stephen Boyd
@ 2016-03-02 9:35 ` Srinivas Kandagatla
0 siblings, 0 replies; 2+ messages in thread
From: Srinivas Kandagatla @ 2016-03-02 9:35 UTC (permalink / raw)
To: Stephen Boyd, Michael Turquette
Cc: linux-kernel, linux-clk, linux-arm-msm, Bjorn Andersson
On 02/03/16 01:30, Stephen Boyd wrote:
> The offset seems to have been copied from the sata clk. Fix it so
> that enabling the crypto engine source clk works.
>
> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control")
> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
> ---
Good find :-)
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> drivers/clk/qcom/gcc-msm8960.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
> index 63ecd97f3793..0a0c1f533249 100644
> --- a/drivers/clk/qcom/gcc-msm8960.c
> +++ b/drivers/clk/qcom/gcc-msm8960.c
> @@ -2753,7 +2753,7 @@ static struct clk_rcg ce3_src = {
> },
> .freq_tbl = clk_tbl_ce3,
> .clkr = {
> - .enable_reg = 0x2c08,
> + .enable_reg = 0x36c0,
> .enable_mask = BIT(7),
> .hw.init = &(struct clk_init_data){
> .name = "ce3_src",
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2016-03-02 1:30 [PATCH] clk: qcom: msm8960: Fix ce3_src register offset Stephen Boyd
2016-03-02 9:35 ` Srinivas Kandagatla
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