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From: Thomas Pedersen <twp@codeaurora.org>
To: linux-arm-msm@vger.kernel.org
Cc: linux@qca.qualcomm.com, Andy Gross <andy.gross@linaro.org>,
	Thomas Pedersen <twp@codeaurora.org>,
	Vinod Koul <vinod.koul@intel.com>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: [RESEND PATCH 1/5] dtbindings: qcom_adm: Fix channel specifiers
Date: Tue, 28 Jun 2016 14:43:02 -0700	[thread overview]
Message-ID: <1467150186-11427-2-git-send-email-twp@codeaurora.org> (raw)
In-Reply-To: <1467150186-11427-1-git-send-email-twp@codeaurora.org>

From: Andy Gross <andy.gross@linaro.org>

This patch removes the crci information from the dma
channel property.  At least one client device requires
using more than one CRCI value for a channel.  This does
not match the current binding and the crci information
needs to be removed.

Instead, the client device will provide this information
via other means.

Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Thomas Pedersen <twp@codeaurora.org>
---
 Documentation/devicetree/bindings/dma/qcom_adm.txt | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/Documentation/devicetree/bindings/dma/qcom_adm.txt b/Documentation/devicetree/bindings/dma/qcom_adm.txt
index 9bcab91..38d45f8 100644
--- a/Documentation/devicetree/bindings/dma/qcom_adm.txt
+++ b/Documentation/devicetree/bindings/dma/qcom_adm.txt
@@ -4,8 +4,7 @@ Required properties:
 - compatible: must contain "qcom,adm" for IPQ/APQ8064 and MSM8960
 - reg: Address range for DMA registers
 - interrupts: Should contain one interrupt shared by all channels
-- #dma-cells: must be <2>.  First cell denotes the channel number.  Second cell
-  denotes CRCI (client rate control interface) flow control assignment.
+- #dma-cells: must be <1>.  First cell denotes the channel number.
 - clocks: Should contain the core clock and interface clock.
 - clock-names: Must contain "core" for the core clock and "iface" for the
   interface clock.
@@ -22,7 +21,7 @@ Example:
 			compatible = "qcom,adm";
 			reg = <0x18300000 0x100000>;
 			interrupts = <0 170 0>;
-			#dma-cells = <2>;
+			#dma-cells = <1>;
 
 			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
 			clock-names = "core", "iface";
@@ -35,15 +34,12 @@ Example:
 			qcom,ee = <0>;
 		};
 
-DMA clients must use the format descripted in the dma.txt file, using a three
+DMA clients must use the format descripted in the dma.txt file, using a two
 cell specifier for each channel.
 
-Each dmas request consists of 3 cells:
+Each dmas request consists of two cells:
  1. phandle pointing to the DMA controller
  2. channel number
- 3. CRCI assignment, if applicable.  If no CRCI flow control is required, use 0.
-    The CRCI is used for flow control.  It identifies the peripheral device that
-    is the source/destination for the transferred data.
 
 Example:
 
@@ -56,7 +52,7 @@ Example:
 
 		cs-gpios = <&qcom_pinmux 20 0>;
 
-		dmas = <&adm_dma 6 9>,
-			<&adm_dma 5 10>;
+		dmas = <&adm_dma 6>,
+			<&adm_dma 5>;
 		dma-names = "rx", "tx";
 	};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

  reply	other threads:[~2016-06-28 21:44 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-28 21:43 [RESEND PATCH 0/5] ipq8064 NAND support Thomas Pedersen
2016-06-28 21:43 ` Thomas Pedersen [this message]
2016-06-29 21:06   ` [RESEND PATCH 1/5] dtbindings: qcom_adm: Fix channel specifiers Andy Gross
2016-07-01 17:50     ` Thomas Pedersen
2016-07-01 19:08       ` Andy Gross
2016-07-28 22:16         ` Thomas Pedersen
2016-08-01 20:37           ` Andy Gross
2016-08-04 17:42             ` Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 2/5] dmaengine: Add ADM driver Thomas Pedersen
2016-12-22 17:55   ` [RESEND,2/5] " Zoran Markovic
2016-12-23 19:53     ` Neil Armstrong
2016-12-27 16:51       ` Andy Gross
2016-06-28 21:43 ` [RESEND PATCH 3/5] arm: qcom: dts: ipq8064: Add ADM device node Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 4/5] arm: qcom: dts: Add NAND controller node for ipq806x Thomas Pedersen
2016-06-28 21:43 ` [RESEND PATCH 5/5] arm: qcom: dts: Enable NAND node on IPQ8064 AP148 platform Thomas Pedersen

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