From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Clark Subject: [PATCH 1/2] iommu/msm: resume device after fault Date: Fri, 12 Aug 2016 11:29:06 -0400 Message-ID: <1471015747-569-1-git-send-email-robdclark@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Sricharan List-Id: linux-arm-msm@vger.kernel.org We need to disable stall on memory access after a fault, otherwise the device using the iommu will be perma-wedged with no access to memory. This was causing drm/msm to be unable to recover the gpu after an iommu fault. Signed-off-by: Rob Clark --- drivers/iommu/msm_iommu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iommu/msm_iommu.c b/drivers/iommu/msm_iommu.c index b09692b..f6f596f 100644 --- a/drivers/iommu/msm_iommu.c +++ b/drivers/iommu/msm_iommu.c @@ -628,6 +628,7 @@ irqreturn_t msm_iommu_fault_handler(int irq, void *dev_id) pr_err("Interesting registers:\n"); print_ctx_regs(iommu->base, i); SET_FSR(iommu->base, i, 0x4000000F); + SET_RESUME(iommu->base, i, 1); } } __disable_clocks(iommu); -- 2.7.4