From: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
To: bjorn.andersson@linaro.org
Cc: sboyd@codeaurora.org, agross@codeaurora.org,
linux-arm-msm@vger.kernel.org,
Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
Subject: [PATCH v4 03/10] remoteproc: qcom: Initialize clock and regulator handle with private data
Date: Wed, 16 Nov 2016 22:31:29 +0530 [thread overview]
Message-ID: <1479315696-15490-4-git-send-email-akdwived@codeaurora.org> (raw)
In-Reply-To: <1479315696-15490-1-git-send-email-akdwived@codeaurora.org>
Clock and voltage regulator voting is needed before we take hexagon
out of reset. Certain regulators and clocks need voting by rproc on
behalf of hexagon only during restart operation but certain clocks
and voltage need to be voted till hexagon is up, these regulators
and clocks are identified as proxy and active resource whose handle is
being obtained by supplying private proxy and active regulator and clock
string.
Signed-off-by: Avaneesh Kumar Dwivedi <akdwived@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_pil.c | 148 +++++++++++++++++++++++++++----------
1 file changed, 109 insertions(+), 39 deletions(-)
diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c
index f43c96b..32e4bbc 100644
--- a/drivers/remoteproc/qcom_q6v5_pil.c
+++ b/drivers/remoteproc/qcom_q6v5_pil.c
@@ -132,6 +132,14 @@ struct q6v5 {
struct clk *ahb_clk;
struct clk *axi_clk;
struct clk *rom_clk;
+ struct clk **active_clks;
+ struct clk **proxy_clks;
+ struct reg_info *active_regs;
+ struct reg_info *proxy_regs;
+ int active_reg_count;
+ int proxy_reg_count;
+ int active_clk_count;
+ int proxy_clk_count;
struct completion start_done;
struct completion stop_done;
@@ -154,27 +162,48 @@ enum {
Q6V5_SUPPLY_PLL,
};
-static int q6v5_regulator_init(struct q6v5 *qproc)
+static int q6v5_regulator_init(struct device *dev,
+ struct reg_info **regs_ref, char **reg_str, int volatage_load[][2])
{
- int ret;
+ int reg_count = 0, i;
+ struct reg_info *regs;
- qproc->supply[Q6V5_SUPPLY_CX].supply = "cx";
- qproc->supply[Q6V5_SUPPLY_MX].supply = "mx";
- qproc->supply[Q6V5_SUPPLY_MSS].supply = "mss";
- qproc->supply[Q6V5_SUPPLY_PLL].supply = "pll";
+ if (!reg_str)
+ return 0;
- ret = devm_regulator_bulk_get(qproc->dev,
- ARRAY_SIZE(qproc->supply), qproc->supply);
- if (ret < 0) {
- dev_err(qproc->dev, "failed to get supplies\n");
- return ret;
- }
+ while (reg_str[reg_count] != NULL)
+ reg_count++;
- regulator_set_load(qproc->supply[Q6V5_SUPPLY_CX].consumer, 100000);
- regulator_set_load(qproc->supply[Q6V5_SUPPLY_MSS].consumer, 100000);
- regulator_set_load(qproc->supply[Q6V5_SUPPLY_PLL].consumer, 10000);
+ if (!reg_count)
+ return reg_count;
- return 0;
+ regs = devm_kzalloc(dev, sizeof(struct reg_info) * reg_count,
+ GFP_KERNEL);
+
+ if (!regs)
+ return -ENOMEM;
+
+ for (i = 0; i < reg_count; i++) {
+ const char *reg_name;
+
+ reg_name = reg_str[i];
+ regs[i].reg = devm_regulator_get(dev, reg_name);
+ if (IS_ERR(regs[i].reg)) {
+
+ int rc = PTR_ERR(regs[i].reg);
+
+ if (rc != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get %s\n regulator",
+ reg_name);
+ return rc;
+ }
+
+ regs[i].uV = volatage_load[i][0];
+ regs[i].uA = volatage_load[i][1];
+ }
+
+ *regs_ref = regs;
+ return reg_count;
}
static int q6v5_regulator_enable(struct q6v5 *qproc)
@@ -719,27 +748,45 @@ static int q6v5_init_mem(struct q6v5 *qproc, struct platform_device *pdev)
return 0;
}
-static int q6v5_init_clocks(struct q6v5 *qproc)
+static int q6v5_init_clocks(struct device *dev, struct clk ***clks_ref,
+ char **clk_str)
{
- qproc->ahb_clk = devm_clk_get(qproc->dev, "iface");
- if (IS_ERR(qproc->ahb_clk)) {
- dev_err(qproc->dev, "failed to get iface clock\n");
- return PTR_ERR(qproc->ahb_clk);
- }
+ int clk_count = 0, i;
+ struct clk **clks;
- qproc->axi_clk = devm_clk_get(qproc->dev, "bus");
- if (IS_ERR(qproc->axi_clk)) {
- dev_err(qproc->dev, "failed to get bus clock\n");
- return PTR_ERR(qproc->axi_clk);
- }
+ if (!clk_str)
+ return 0;
+
+ while (clk_str[clk_count] != NULL)
+ clk_count++;
+
+ if (!clk_count)
+ return clk_count;
+
+ clks = devm_kzalloc(dev, sizeof(struct clk *) * clk_count,
+ GFP_KERNEL);
+ if (!clks)
+ return -ENOMEM;
+
+ for (i = 0; i < clk_count; i++) {
+ const char *clock_name;
+
+ clock_name = clk_str[i];
+ clks[i] = devm_clk_get(dev, clock_name);
+ if (IS_ERR(clks[i])) {
+
+ int rc = PTR_ERR(clks[i]);
+
+ if (rc != -EPROBE_DEFER)
+ dev_err(dev, "Failed to get %s clock\n",
+ clock_name);
+ return rc;
+ }
- qproc->rom_clk = devm_clk_get(qproc->dev, "mem");
- if (IS_ERR(qproc->rom_clk)) {
- dev_err(qproc->dev, "failed to get mem clock\n");
- return PTR_ERR(qproc->rom_clk);
}
- return 0;
+ *clks_ref = clks;
+ return clk_count;
}
static int q6v5_init_reset(void *q, void *p)
@@ -845,7 +892,7 @@ static int q6v5_probe(struct platform_device *pdev)
struct q6v5 *qproc;
struct rproc *rproc;
const struct q6_rproc_res *desc;
- int ret;
+ int ret, count;
desc = of_device_get_match_data(&pdev->dev);
if (!desc)
@@ -876,17 +923,40 @@ static int q6v5_probe(struct platform_device *pdev)
if (ret)
goto free_rproc;
- ret = q6v5_init_clocks(qproc);
- if (ret)
- goto free_rproc;
+ count = q6v5_init_clocks(&pdev->dev, &qproc->proxy_clks,
+ desc->proxy_clk_string);
+ if (count < 0) {
+ dev_err(&pdev->dev, "Failed to setup proxy clocks.\n");
+ return count;
+ }
+ qproc->proxy_clk_count = count;
- ret = q6v5_regulator_init(qproc);
- if (ret)
- goto free_rproc;
+ count = q6v5_init_clocks(&pdev->dev, &qproc->active_clks,
+ desc->active_clk_string);
+ if (count < 0) {
+ dev_err(&pdev->dev, "Failed to setup active clocks.\n");
+ return count;
+ }
+ qproc->active_clk_count = count;
ret = desc->q6_reset_init(qproc, pdev);
if (ret)
goto free_rproc;
+ count = q6v5_regulator_init(&pdev->dev, &qproc->proxy_regs,
+ desc->proxy_reg_string, (int (*)[2])desc->proxy_voltage_load);
+ if (count < 0) {
+ dev_err(&pdev->dev, "Failed to setup active regulators.\n");
+ return count;
+ }
+ qproc->proxy_reg_count = count;
+
+ count = q6v5_regulator_init(&pdev->dev, &qproc->active_regs,
+ desc->active_reg_string, (int (*)[2])desc->active_voltage_load);
+ if (count < 0) {
+ dev_err(&pdev->dev, "Failed to setup proxy regulators.\n");
+ return count;
+ }
+ qproc->active_reg_count = count;
ret = q6v5_request_irq(qproc, pdev, "wdog", q6v5_wdog_interrupt);
if (ret < 0)
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.
next prev parent reply other threads:[~2016-11-16 17:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-16 17:01 [PATCH v4 00/10]remoteproc: qcom: Add support to hexagon q6v56 in qcom hexagon rproc driver Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 01/10] remoteproc: qcom: Add and initialize private data for hexagon dsp Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 02/10] remoteproc: qcom: Initialize MSS reset control handle Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` Avaneesh Kumar Dwivedi [this message]
2016-11-16 17:01 ` [PATCH v4 04/10] remoteproc: qcom: Modify regulator enable and disable interface Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 05/10] remoteproc: qcom: Separate out regulator disable routine in two Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 06/10] remoteproc: qcom: Modify clock enable and disable routine Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 07/10] remoteproc: qcom: Add new routine for mss restart programming Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 08/10] remoteproc: qcom: Modify reset sequence for hexagon to support q6v56 Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 09/10] remoteproc: qcom: Modify stop routine for q6v56 specific step Avaneesh Kumar Dwivedi
2016-11-16 17:01 ` [PATCH v4 10/10] remoteproc: qcom: Adding required initialization for q6v5 hexagon Avaneesh Kumar Dwivedi
2016-11-16 23:03 ` [PATCH v4 00/10]remoteproc: qcom: Add support to hexagon q6v56 in qcom hexagon rproc driver Stephen Boyd
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