From mboxrd@z Thu Jan 1 00:00:00 1970 From: Archit Taneja Subject: [PATCH 0/6] drm/msm/mdp5: Encoder related cleanups Date: Mon, 19 Dec 2016 15:34:04 +0530 Message-ID: <1482141850-23393-1-git-send-email-architt@codeaurora.org> Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:55374 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752724AbcLSKES (ORCPT ); Mon, 19 Dec 2016 05:04:18 -0500 Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: robdclark@gmail.com Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, Archit Taneja The MDP5 and DSI drivers created 2 drm_encoders for a DSI interface (one for each mode of operation). This patch fixes that. Now, with the # encoders equal to the # of displays, we can create the right # of CRTCs. We previously created LM # of CRTCs, which ate up too many primary planes. Archit Taneja (6): drm/msm: Construct only one encoder for DSI drm/msm: Set encoder's mode of operation using a kms func drm/msm/mdp5: Prepare for merging video and command encoders drm/msm/mdp5: Create single encoder per interface (INTF) drm/msm/mdp5: cfg: Change count to unsigned int drm/msm/mdp5: Create only as many CRTCs as we need drivers/gpu/drm/msm/dsi/dsi.c | 17 ++- drivers/gpu/drm/msm/dsi/dsi.h | 5 +- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 + drivers/gpu/drm/msm/dsi/dsi_manager.c | 34 +++--- drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 28 +++-- drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +- drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c | 135 +++--------------------- drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 77 ++++++++++---- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 86 ++++++++------- drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 37 +++++-- drivers/gpu/drm/msm/msm_drv.h | 9 +- drivers/gpu/drm/msm/msm_kms.h | 3 + 12 files changed, 195 insertions(+), 240 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation