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From: Rajendra Nayak <rnayak@codeaurora.org>
To: sboyd@codeaurora.org, mturquette@baylibre.com
Cc: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH 5/5] clk: qcom: mmcc-8996: Associate all mmagic clks with mmagic gdscs
Date: Tue, 21 Mar 2017 11:45:23 +0530	[thread overview]
Message-ID: <1490076923-20194-6-git-send-email-rnayak@codeaurora.org> (raw)
In-Reply-To: <1490076923-20194-1-git-send-email-rnayak@codeaurora.org>

With support added to control clocks associated with a gdsc from within
the gdsc driver, associate all mmagic clock instances with the respective
mmagic gdscs so devices inside these mmagic domains do not have to control
them individually.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/mmcc-msm8996.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
index 9b97246..7c0ffb5 100644
--- a/drivers/clk/qcom/mmcc-msm8996.c
+++ b/drivers/clk/qcom/mmcc-msm8996.c
@@ -2893,6 +2893,10 @@ enum {
 	.pd = {
 		.name = "mmagic_bimc",
 	},
+	.clk_hws = {
+		&mmagic_bimc_noc_cfg_ahb_clk.clkr.hw,
+	},
+	.clk_count = 1,
 	.pwrsts = PWRSTS_OFF_ON,
 };
 
@@ -2902,6 +2906,13 @@ enum {
 	.pd = {
 		.name = "mmagic_video",
 	},
+	.clk_hws = {
+		&mmss_mmagic_ahb_clk.clkr.hw,
+		&mmss_mmagic_cfg_ahb_clk.clkr.hw,
+		&mmagic_video_axi_clk.clkr.hw,
+		&mmagic_video_noc_cfg_ahb_clk.clkr.hw,
+	},
+	.clk_count = 4,
 	.pwrsts = PWRSTS_OFF_ON,
 	.flags = VOTABLE,
 };
@@ -2912,6 +2923,13 @@ enum {
 	.pd = {
 		.name = "mmagic_mdss",
 	},
+	.clk_hws = {
+		&mmss_mmagic_ahb_clk.clkr.hw,
+		&mmss_mmagic_cfg_ahb_clk.clkr.hw,
+		&mmagic_mdss_axi_clk.clkr.hw,
+		&mmagic_mdss_noc_cfg_ahb_clk.clkr.hw,
+	},
+	.clk_count = 4,
 	.pwrsts = PWRSTS_OFF_ON,
 	.flags = VOTABLE,
 };
@@ -2922,6 +2940,13 @@ enum {
 	.pd = {
 		.name = "mmagic_camss",
 	},
+	.clk_hws = {
+		&mmss_mmagic_ahb_clk.clkr.hw,
+		&mmss_mmagic_cfg_ahb_clk.clkr.hw,
+		&mmagic_camss_axi_clk.clkr.hw,
+		&mmagic_camss_noc_cfg_ahb_clk.clkr.hw,
+	},
+	.clk_count = 4,
 	.pwrsts = PWRSTS_OFF_ON,
 	.flags = VOTABLE,
 };
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation


      parent reply	other threads:[~2017-03-21  6:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-21  6:15 [PATCH 0/5] clk: qcom: gdsc: Add support for clk control Rajendra Nayak
2017-03-21  6:15 ` [PATCH 1/5] arm64: qcom: Select PM_GENERIC_DOMAINS Rajendra Nayak
2017-03-21  6:15 ` [PATCH 2/5] clk: Add clk_hw_get_clk() helper API to be used by clk providers Rajendra Nayak
2017-03-21  6:15 ` [PATCH 3/5] clk: qcom: gdsc: Add support to control associated clks Rajendra Nayak
2017-06-14 11:40   ` Stanimir Varbanov
2017-06-21  6:11     ` Rajendra Nayak
2017-06-21  8:37       ` Stanimir Varbanov
2017-03-21  6:15 ` [PATCH 4/5] clk: qcom: gcc-msm8996: Mark gcc_mmss_noc_cfg_ahb_clk as a critical clock Rajendra Nayak
2017-03-21  6:15 ` Rajendra Nayak [this message]

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