From: Manu Gautam <mgautam@codeaurora.org>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Felipe Balbi <balbi@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org,
Manu Gautam <mgautam@codeaurora.org>,
Vivek Gautam <vivek.gautam@codeaurora.org>,
Varadarajan Narayanan <varada@codeaurora.org>,
Jaehoon Chung <jh80.chung@samsung.com>,
Fengguang Wu <fengguang.wu@intel.com>,
Wei Yongjun <weiyongjun1@huawei.com>,
"open list:GENERIC PHY FRAMEWORK" <linux-kernel@vger.kernel.org>
Subject: [PATCH v2 16/17] phy: qcom-qmp: Override lane0_power_present signal in device mode
Date: Wed, 27 Sep 2017 14:29:12 +0530 [thread overview]
Message-ID: <1506502753-27408-17-git-send-email-mgautam@codeaurora.org> (raw)
In-Reply-To: <1506502753-27408-1-git-send-email-mgautam@codeaurora.org>
lane0_power_present signal must be asserted of hardware to
operate properly in SS device mode. On some platforms where VBUS
line is not connected to SS QMP PHY there is SS_PHY_CTRL register
in QSCRATCH wrapper that can be used by software to override VBUS.
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 38 +++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c
index d4e1436..1403de3 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -61,6 +61,9 @@
#define USB3_MODE BIT(0) /* enables USB3 mode */
#define DP_MODE BIT(1) /* enables DP mode */
+/* QSCRATCH register bits */
+#define QSCRATCH_SS_PHY_CTRL 0x30
+#define LANE0_PWR_PRESENT BIT(24)
#define PHY_INIT_COMPLETE_TIMEOUT 1000
#define POWER_DOWN_DELAY_US_MIN 10
@@ -558,6 +561,7 @@ struct qmp_phy {
* @dev: device
* @serdes: iomapped memory space for phy's serdes
* @dp_com: iomapped memory space for phy's dp_com control block
+ * @qscratch_base: iomapped memory space for qscratch region
*
* @clks: array of clocks required by phy
* @resets: array of resets required by phy
@@ -572,6 +576,7 @@ struct qcom_qmp {
struct device *dev;
void __iomem *serdes;
void __iomem *dp_com;
+ void __iomem *qscratch_base;
struct clk_bulk_data *clks;
struct reset_control **resets;
@@ -582,6 +587,7 @@ struct qcom_qmp {
struct mutex phy_mutex;
int init_count;
+ enum phy_mode mode;
};
static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
@@ -1024,6 +1030,26 @@ static int qcom_qmp_phy_exit(struct phy *phy)
return 0;
}
+static int qcom_qmp_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+ struct qmp_phy *qphy = phy_get_drvdata(phy);
+ struct qcom_qmp *qmp = qphy->qmp;
+
+ qmp->mode = mode;
+
+ /* Update VBUS override in qscratch register */
+ if (qmp->qscratch_base) {
+ if (mode == PHY_MODE_USB_DEVICE)
+ qphy_setbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL,
+ LANE0_PWR_PRESENT);
+ else
+ qphy_clrbits(qmp->qscratch_base, QSCRATCH_SS_PHY_CTRL,
+ LANE0_PWR_PRESENT);
+ }
+
+ return 0;
+}
+
static int qcom_qmp_phy_vreg_init(struct device *dev)
{
struct qcom_qmp *qmp = dev_get_drvdata(dev);
@@ -1133,6 +1159,7 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
static const struct phy_ops qcom_qmp_phy_gen_ops = {
.init = qcom_qmp_phy_init,
.exit = qcom_qmp_phy_exit,
+ .set_mode = qcom_qmp_phy_set_mode,
.owner = THIS_MODULE,
};
@@ -1273,7 +1300,18 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
qmp->dp_com = base;
}
+ /* Check if platform uses qscratch wrapper */
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qscratch");
+ if (res) {
+ /* Can't request region as used by other phy and glue drivers */
+ qmp->qscratch_base = devm_ioremap(dev, res->start,
+ resource_size(res));
+ if (IS_ERR(qmp->qscratch_base))
+ return PTR_ERR(qmp->qscratch_base);
+ }
+
mutex_init(&qmp->phy_mutex);
+ qmp->mode = PHY_MODE_INVALID;
ret = qcom_qmp_phy_clk_init(dev);
if (ret)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-09-27 8:59 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-27 8:58 [PATCH v2 00/17] Support for Qualcomm QUSBv2 and QMPv3 USB PHYs Manu Gautam
2017-09-27 8:58 ` [PATCH v2 01/17] phy: qcom-qmp: Fix phy pipe clock gating Manu Gautam
2017-09-27 8:58 ` [PATCH v2 02/17] phy: qcom-qmp: Adapt to clk_bulk_* APIs Manu Gautam
2017-09-27 8:58 ` [PATCH v2 03/17] phy: qcom-qmp: Power-on PHY before initialization Manu Gautam
2017-09-27 8:59 ` [PATCH v2 04/17] phy: qcom-qusb2: " Manu Gautam
2017-09-27 8:59 ` [PATCH v2 05/17] phy: qcom-qmp: Fix PHY block reset sequence Manu Gautam
2017-09-27 8:59 ` [PATCH v2 06/17] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Manu Gautam
2017-09-27 8:59 ` [PATCH v2 07/17] phy: qcom-qusb2: Add support for different register layouts Manu Gautam
2017-09-27 8:59 ` [PATCH v2 08/17] dt-bindings: phy-qcom-qusb2: Update binding for QUSB2 V2 version Manu Gautam
2017-10-05 22:10 ` Rob Herring
2017-09-27 8:59 ` [PATCH v2 09/17] phy: qcom-qusb2: Add support " Manu Gautam
2017-09-27 8:59 ` [PATCH v2 10/17] phy: qcom-qmp: Move register offsets to header file Manu Gautam
2017-09-27 8:59 ` [PATCH v2 11/17] phy: qcom-qmp: Add register offsets for QMP V3 PHY Manu Gautam
2017-09-27 8:59 ` [PATCH v2 12/17] dt-bindings: phy-qcom-qmp: Update bindings for QMP V3 USB PHY Manu Gautam
2017-10-05 22:14 ` Rob Herring
2017-09-27 8:59 ` [PATCH v2 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY Manu Gautam
2017-09-27 17:59 ` Jack Pham
2017-10-05 6:30 ` Manu Gautam
2017-09-27 8:59 ` [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode Manu Gautam
2017-09-27 17:57 ` Jack Pham
2017-09-27 19:16 ` Jack Pham
2017-09-28 4:00 ` Manu Gautam
2017-09-28 16:53 ` Jack Pham
2017-10-05 9:08 ` Manu Gautam
2017-10-09 8:03 ` Manu Gautam
2017-10-23 10:49 ` Manu Gautam
2017-09-27 8:59 ` [PATCH v2 15/17] phy: qcom-qusb2: Add support for runtime PM Manu Gautam
2017-09-27 8:59 ` Manu Gautam [this message]
2017-09-27 8:59 ` [PATCH v2 17/17] phy: qcom-qmp: " Manu Gautam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1506502753-27408-17-git-send-email-mgautam@codeaurora.org \
--to=mgautam@codeaurora.org \
--cc=balbi@kernel.org \
--cc=fengguang.wu@intel.com \
--cc=jh80.chung@samsung.com \
--cc=kishon@ti.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-usb@vger.kernel.org \
--cc=varada@codeaurora.org \
--cc=vivek.gautam@codeaurora.org \
--cc=weiyongjun1@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).