[PATCH 0/3] clk: qcom: msm8996: handle mmagic gdscs and clocks

[PATCH 0/3] clk: qcom: msm8996: handle mmagic gdscs and clocks

[Rajendra Nayak]

With no bus driver to handle the mmagic bus clocks and gdscs on msm8996,
its best to just turn them all ON at gdsc/clk driver probe and leave
them ON thereafter. This should unblock a lot of multimedia support on
msm8996 which rely on these to be ON and have no way to control them at
this point. Once we do have better noc/bus management drivers in place
we can avoid leaving these ON always and turn them ON/OFF as needed.

Rajendra Nayak (3):
  clk: qcom: gdsc: Add support for ALWAYS_ON gdscs
  clk: qcom: Register the gdscs before the clocks
  clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always    
    enabled

 drivers/clk/qcom/common.c       | 32 ++++++++++++++++----------------
 drivers/clk/qcom/gdsc.c         |  8 ++++++++
 drivers/clk/qcom/gdsc.h         |  1 +
 drivers/clk/qcom/mmcc-msm8996.c | 22 +++++++++++-----------
 4 files changed, 36 insertions(+), 27 deletions(-)

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

[PATCH 1/3] clk: qcom: gdsc: Add support for ALWAYS_ON gdscs

[Rajendra Nayak]

Some GDSCs might have software control to turn them off, but we might
want to keep them enabled always, in some cases because of lack of
support in kernel to handle a graceful turning off/on of such GDSCs.
Most common instances would be the GDCSs which power up the noc/bus
fabrics, which need bus drivers to handle them and atleast support for
which is missing on all qcom SoCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/gdsc.c | 8 ++++++++
 drivers/clk/qcom/gdsc.h | 1 +
 2 files changed, 9 insertions(+)

diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
index a4f3580..15f4bb5 100644
--- a/drivers/clk/qcom/gdsc.c
+++ b/drivers/clk/qcom/gdsc.c
@@ -291,6 +291,14 @@ static int gdsc_init(struct gdsc *sc)
 	if ((sc->flags & VOTABLE) && on)
 		gdsc_enable(&sc->pd);
 
+	/* If ALWAYS_ON GDSCs are not ON, turn them ON */
+	if (sc->flags & ALWAYS_ON) {
+		if (!on)
+			gdsc_enable(&sc->pd);
+		on = true;
+		sc->pd.flags |= GENPD_FLAG_ALWAYS_ON;
+	}
+
 	if (on || (sc->pwrsts & PWRSTS_RET))
 		gdsc_force_mem_on(sc);
 	else
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
index 3964834..7fd78ce 100644
--- a/drivers/clk/qcom/gdsc.h
+++ b/drivers/clk/qcom/gdsc.h
@@ -53,6 +53,7 @@ struct gdsc {
 #define VOTABLE		BIT(0)
 #define CLAMP_IO	BIT(1)
 #define HW_CTRL		BIT(2)
+#define ALWAYS_ON	BIT(3)
 	struct reset_controller_dev	*rcdev;
 	unsigned int			*resets;
 	unsigned int			reset_count;
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

[PATCH 2/3] clk: qcom: Register the gdscs before the clocks

[Rajendra Nayak]

We have atleast some instances of ALWAYS_ON gdscs, which need to
be turned ON *before* some clocks within the gdsc domain marked
with a CLK_IS_CRITICAL can be turned ON.
To facilitate this sequence, register the GDCSs (and hence handle
the ALWAYS_ON gdscs) before we register clocks (and handle the
clocks marked as CLK_IS_CRITICAL)

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/common.c | 32 ++++++++++++++++----------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index d523991..d7b0b6b 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -232,6 +232,22 @@ int qcom_cc_really_probe(struct platform_device *pdev,
 	size_t num_clks = desc->num_clks;
 	struct clk_regmap **rclks = desc->clks;
 
+	if (desc->gdscs && desc->num_gdscs) {
+		scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
+		if (!scd)
+			return -ENOMEM;
+		scd->dev = dev;
+		scd->scs = desc->gdscs;
+		scd->num = desc->num_gdscs;
+		ret = gdsc_register(scd, &reset->rcdev, regmap);
+		if (ret)
+			return ret;
+		ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
+					       scd);
+		if (ret)
+			return ret;
+	}
+
 	cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
 	if (!cc)
 		return -ENOMEM;
@@ -276,22 +292,6 @@ int qcom_cc_really_probe(struct platform_device *pdev,
 	if (ret)
 		return ret;
 
-	if (desc->gdscs && desc->num_gdscs) {
-		scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
-		if (!scd)
-			return -ENOMEM;
-		scd->dev = dev;
-		scd->scs = desc->gdscs;
-		scd->num = desc->num_gdscs;
-		ret = gdsc_register(scd, &reset->rcdev, regmap);
-		if (ret)
-			return ret;
-		ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
-					       scd);
-		if (ret)
-			return ret;
-	}
-
 	return 0;
 }
 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

[PATCH 3/3] clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled

[Rajendra Nayak]

There's no bus infrastructure today to handle all the mmagic bus
clocks and GDSCs needed by all the multimedia blocks in msm8996, like
mdss, video, camera and gpu. Mark all these clocks with a CLK_IS_CRITICAL
and GDSCs with a ALWAYS_ON flag for now so they are left always enabled.
This patch should be reverted at some point when we do have a bus driver
to manage these clocks and GDSCs.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
 drivers/clk/qcom/mmcc-msm8996.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
index 352394d..3ba37f3 100644
--- a/drivers/clk/qcom/mmcc-msm8996.c
+++ b/drivers/clk/qcom/mmcc-msm8996.c
@@ -1229,7 +1229,7 @@ enum {
 			.name = "mmss_mmagic_ahb_clk",
 			.parent_names = (const char *[]){ "ahb_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1244,7 +1244,7 @@ enum {
 			.name = "mmss_mmagic_cfg_ahb_clk",
 			.parent_names = (const char *[]){ "ahb_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1303,7 +1303,7 @@ enum {
 			.name = "mmagic_camss_axi_clk",
 			.parent_names = (const char *[]){ "axi_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1318,7 +1318,7 @@ enum {
 			.name = "mmagic_camss_noc_cfg_ahb_clk",
 			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1423,7 +1423,7 @@ enum {
 			.name = "mmagic_mdss_axi_clk",
 			.parent_names = (const char *[]){ "axi_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1438,7 +1438,7 @@ enum {
 			.name = "mmagic_mdss_noc_cfg_ahb_clk",
 			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1513,7 +1513,7 @@ enum {
 			.name = "mmagic_video_axi_clk",
 			.parent_names = (const char *[]){ "axi_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -1528,7 +1528,7 @@ enum {
 			.name = "mmagic_video_noc_cfg_ahb_clk",
 			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2903,7 +2903,7 @@ enum {
 		.name = "mmagic_video",
 	},
 	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
+	.flags = VOTABLE | ALWAYS_ON,
 };
 
 static struct gdsc mmagic_mdss_gdsc = {
@@ -2913,7 +2913,7 @@ enum {
 		.name = "mmagic_mdss",
 	},
 	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
+	.flags = VOTABLE | ALWAYS_ON,
 };
 
 static struct gdsc mmagic_camss_gdsc = {
@@ -2923,7 +2923,7 @@ enum {
 		.name = "mmagic_camss",
 	},
 	.pwrsts = PWRSTS_OFF_ON,
-	.flags = VOTABLE,
+	.flags = VOTABLE | ALWAYS_ON,
 };
 
 static struct gdsc venus_gdsc = {
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation

Re: [PATCH 1/3] clk: qcom: gdsc: Add support for ALWAYS_ON gdscs

[Archit Taneja]

On 10/12/2017 12:28 PM, Rajendra Nayak wrote:
> Some GDSCs might have software control to turn them off, but we might
> want to keep them enabled always, in some cases because of lack of
> support in kernel to handle a graceful turning off/on of such GDSCs.
> Most common instances would be the GDCSs which power up the noc/bus
> fabrics, which need bus drivers to handle them and atleast support for
> which is missing on all qcom SoCs.

Tested-by: Archit Taneja <architt@codeaurora.org>

> 
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
>   drivers/clk/qcom/gdsc.c | 8 ++++++++
>   drivers/clk/qcom/gdsc.h | 1 +
>   2 files changed, 9 insertions(+)
> 
> diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c
> index a4f3580..15f4bb5 100644
> --- a/drivers/clk/qcom/gdsc.c
> +++ b/drivers/clk/qcom/gdsc.c
> @@ -291,6 +291,14 @@ static int gdsc_init(struct gdsc *sc)
>   	if ((sc->flags & VOTABLE) && on)
>   		gdsc_enable(&sc->pd);
>   
> +	/* If ALWAYS_ON GDSCs are not ON, turn them ON */
> +	if (sc->flags & ALWAYS_ON) {
> +		if (!on)
> +			gdsc_enable(&sc->pd);
> +		on = true;
> +		sc->pd.flags |= GENPD_FLAG_ALWAYS_ON;
> +	}
> +
>   	if (on || (sc->pwrsts & PWRSTS_RET))
>   		gdsc_force_mem_on(sc);
>   	else
> diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h
> index 3964834..7fd78ce 100644
> --- a/drivers/clk/qcom/gdsc.h
> +++ b/drivers/clk/qcom/gdsc.h
> @@ -53,6 +53,7 @@ struct gdsc {
>   #define VOTABLE		BIT(0)
>   #define CLAMP_IO	BIT(1)
>   #define HW_CTRL		BIT(2)
> +#define ALWAYS_ON	BIT(3)
>   	struct reset_controller_dev	*rcdev;
>   	unsigned int			*resets;
>   	unsigned int			reset_count;
> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 2/3] clk: qcom: Register the gdscs before the clocks

[Archit Taneja]

On 10/12/2017 12:28 PM, Rajendra Nayak wrote:
> We have atleast some instances of ALWAYS_ON gdscs, which need to
> be turned ON *before* some clocks within the gdsc domain marked
> with a CLK_IS_CRITICAL can be turned ON.
> To facilitate this sequence, register the GDCSs (and hence handle
> the ALWAYS_ON gdscs) before we register clocks (and handle the
> clocks marked as CLK_IS_CRITICAL)

GDSC registration requires the reset controller to be registered before.
So, the ideal sequence of registration should be:

- register reset controller
- register gdscs
- register clocks

With that:

Reviewed-by: Archit Taneja <architt@codeaurora.org>

>  > Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
>   drivers/clk/qcom/common.c | 32 ++++++++++++++++----------------
>   1 file changed, 16 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
> index d523991..d7b0b6b 100644
> --- a/drivers/clk/qcom/common.c
> +++ b/drivers/clk/qcom/common.c
> @@ -232,6 +232,22 @@ int qcom_cc_really_probe(struct platform_device *pdev,
>   	size_t num_clks = desc->num_clks;
>   	struct clk_regmap **rclks = desc->clks;
>   
> +	if (desc->gdscs && desc->num_gdscs) {
> +		scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
> +		if (!scd)
> +			return -ENOMEM;
> +		scd->dev = dev;
> +		scd->scs = desc->gdscs;
> +		scd->num = desc->num_gdscs;
> +		ret = gdsc_register(scd, &reset->rcdev, regmap);
> +		if (ret)
> +			return ret;
> +		ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
> +					       scd);
> +		if (ret)
> +			return ret;
> +	}
> +
>   	cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
>   	if (!cc)
>   		return -ENOMEM;
> @@ -276,22 +292,6 @@ int qcom_cc_really_probe(struct platform_device *pdev,
>   	if (ret)
>   		return ret;
>   
> -	if (desc->gdscs && desc->num_gdscs) {
> -		scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
> -		if (!scd)
> -			return -ENOMEM;
> -		scd->dev = dev;
> -		scd->scs = desc->gdscs;
> -		scd->num = desc->num_gdscs;
> -		ret = gdsc_register(scd, &reset->rcdev, regmap);
> -		if (ret)
> -			return ret;
> -		ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
> -					       scd);
> -		if (ret)
> -			return ret;
> -	}
> -
>   	return 0;
>   }
>   EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 3/3] clk: qcom: mmcc-msm8996: leave all mmagic gdscs and clocks always enabled

[Archit Taneja]

On 10/12/2017 12:28 PM, Rajendra Nayak wrote:
> There's no bus infrastructure today to handle all the mmagic bus
> clocks and GDSCs needed by all the multimedia blocks in msm8996, like
> mdss, video, camera and gpu. Mark all these clocks with a CLK_IS_CRITICAL
> and GDSCs with a ALWAYS_ON flag for now so they are left always enabled.
> This patch should be reverted at some point when we do have a bus driver
> to manage these clocks and GDSCs.

The mmagic_bimc_gdsc is needed by display too on 8x96. If I add the new
ALWAYS_ON flag to it, display starts working okay. With that change:

Tested-by: Archit Taneja <architt@codeaurora.org>

Thanks,
Archit

> 
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
>   drivers/clk/qcom/mmcc-msm8996.c | 22 +++++++++++-----------
>   1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/clk/qcom/mmcc-msm8996.c b/drivers/clk/qcom/mmcc-msm8996.c
> index 352394d..3ba37f3 100644
> --- a/drivers/clk/qcom/mmcc-msm8996.c
> +++ b/drivers/clk/qcom/mmcc-msm8996.c
> @@ -1229,7 +1229,7 @@ enum {
>   			.name = "mmss_mmagic_ahb_clk",
>   			.parent_names = (const char *[]){ "ahb_clk_src" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1244,7 +1244,7 @@ enum {
>   			.name = "mmss_mmagic_cfg_ahb_clk",
>   			.parent_names = (const char *[]){ "ahb_clk_src" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1303,7 +1303,7 @@ enum {
>   			.name = "mmagic_camss_axi_clk",
>   			.parent_names = (const char *[]){ "axi_clk_src" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1318,7 +1318,7 @@ enum {
>   			.name = "mmagic_camss_noc_cfg_ahb_clk",
>   			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1423,7 +1423,7 @@ enum {
>   			.name = "mmagic_mdss_axi_clk",
>   			.parent_names = (const char *[]){ "axi_clk_src" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1438,7 +1438,7 @@ enum {
>   			.name = "mmagic_mdss_noc_cfg_ahb_clk",
>   			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1513,7 +1513,7 @@ enum {
>   			.name = "mmagic_video_axi_clk",
>   			.parent_names = (const char *[]){ "axi_clk_src" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -1528,7 +1528,7 @@ enum {
>   			.name = "mmagic_video_noc_cfg_ahb_clk",
>   			.parent_names = (const char *[]){ "gcc_mmss_noc_cfg_ahb_clk" },
>   			.num_parents = 1,
> -			.flags = CLK_SET_RATE_PARENT,
> +			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
>   			.ops = &clk_branch2_ops,
>   		},
>   	},
> @@ -2903,7 +2903,7 @@ enum {
>   		.name = "mmagic_video",
>   	},
>   	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> +	.flags = VOTABLE | ALWAYS_ON,
>   };
>   
>   static struct gdsc mmagic_mdss_gdsc = {
> @@ -2913,7 +2913,7 @@ enum {
>   		.name = "mmagic_mdss",
>   	},
>   	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> +	.flags = VOTABLE | ALWAYS_ON,
>   };
>   
>   static struct gdsc mmagic_camss_gdsc = {
> @@ -2923,7 +2923,7 @@ enum {
>   		.name = "mmagic_camss",
>   	},
>   	.pwrsts = PWRSTS_OFF_ON,
> -	.flags = VOTABLE,
> +	.flags = VOTABLE | ALWAYS_ON,
>   };
>   
>   static struct gdsc venus_gdsc = {
> 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project