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From: Sharat Masetty <smasetty@codeaurora.org>
To: freedreno@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org,
	Sharat Masetty <smasetty@codeaurora.org>,
	dri-devel@lists.freedesktop.org
Subject: [PATCH 4/6] drm/msm/A6xx: Enable preemption for A6xx targets
Date: Thu,  8 Mar 2018 11:36:23 +0530	[thread overview]
Message-ID: <1520489185-21828-5-git-send-email-smasetty@codeaurora.org> (raw)
In-Reply-To: <1520489185-21828-1-git-send-email-smasetty@codeaurora.org>

This patch simply increases the number of available ringbuffers,
therefore enabling preemption.

Signed-off-by: Sharat Masetty <smasetty@codeaurora.org>
---
 drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index b1a80ec..e83b066 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -1040,7 +1040,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
 	adreno_gpu->registers = a6xx_registers;
 	adreno_gpu->reg_offsets = a6xx_register_offsets;
 
-	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);
+	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);
 	if (ret) {
 		a6xx_destroy(&(a6xx_gpu->base.base));
 		return ERR_PTR(ret);
-- 
1.9.1

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  parent reply	other threads:[~2018-03-08  6:06 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-08  6:06 [PATCH 0/6] Preemption support for A6xx targets Sharat Masetty
2018-03-08  6:06 ` [PATCH 1/6] drm/msm: Add submitqueue setup and close Sharat Masetty
2018-03-08  6:06 ` [PATCH 3/6] drm/msm/A6xx: Implement preemption for A6XX targets Sharat Masetty
2018-03-08  6:06 ` Sharat Masetty [this message]
     [not found] ` <1520489185-21828-1-git-send-email-smasetty-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-08  6:06   ` [PATCH 2/6] drm/msm: Add new PM4 type7 opcodes Sharat Masetty
2018-03-08  6:06   ` [PATCH 5/6] drm/msm/Adreno: Refactor some preemption code Sharat Masetty
2018-03-08  6:06 ` [PATCH 6/6] drm/msm/A6xx: Enable L1 preemption level Sharat Masetty

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