From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sinan Kaya Subject: [PATCH v3 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Date: Tue, 3 Apr 2018 08:55:03 -0400 Message-ID: <1522760109-16497-1-git-send-email-okaya@codeaurora.org> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: Sender: linux-kernel-owner@vger.kernel.org To: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org, sulrich@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Sinan Kaya , Ralf Baechle , James Hogan , Paul Burton , linux-kernel@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org writeX() has a strong ordering semantics with respect to memory updates. In the abscence of a write barrier or a compiler barrier, commpiler can reorder register and memory update instructions. This breaks the writeX() API. Signed-off-by: Sinan Kaya --- arch/mips/include/asm/io.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 0cbf3af..fd00ddaf 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -307,7 +307,7 @@ static inline void iounmap(const volatile void __iomem *addr) #if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT) #define war_io_reorder_wmb() wmb() #else -#define war_io_reorder_wmb() do { } while (0) +#define war_io_reorder_wmb() barrier() #endif #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ -- 2.7.4