From: Jeykumar Sankaran <jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: hoegsberg-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
Jeykumar Sankaran
<jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
robdclark-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org
Subject: [PATCH v2 4/4] drm/msm/dpu: remove mode_set_complete
Date: Wed, 13 Feb 2019 17:52:22 -0800 [thread overview]
Message-ID: <1550109142-28303-5-git-send-email-jsanka@codeaurora.org> (raw)
In-Reply-To: <1550109142-28303-1-git-send-email-jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
This flag was introduced as a fix to notify modeset complete
when hw reservations were happening in both atomic_check
and atomic_commit paths. Now that we are reserving only in
atomic_check, we can get rid of this flag.
changes in v2:
- none
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Reviewed-by: Sean Paul <seanpaul@chromium.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 12 +-----------
1 file changed, 1 insertion(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 86c025b..beb9f86 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -170,7 +170,6 @@ enum dpu_enc_rc_states {
* clks and resources after IDLE_TIMEOUT time.
* @vsync_event_work: worker to handle vsync event for autorefresh
* @topology: topology of the display
- * @mode_set_complete: flag to indicate modeset completion
* @idle_timeout: idle timeout duration in milliseconds
*/
struct dpu_encoder_virt {
@@ -208,7 +207,6 @@ struct dpu_encoder_virt {
struct delayed_work delayed_off_work;
struct kthread_work vsync_event_work;
struct msm_display_topology topology;
- bool mode_set_complete;
u32 idle_timeout;
};
@@ -604,12 +602,7 @@ static int dpu_encoder_virt_atomic_check(
}
}
- /*
- * Avoid reserving resources when mode set is pending. Topology
- * info may not be available to complete reservation.
- */
- if (!ret && drm_atomic_crtc_needs_modeset(crtc_state)
- && dpu_enc->mode_set_complete) {
+ if (!ret && drm_atomic_crtc_needs_modeset(crtc_state)) {
struct msm_display_topology topology;
struct dpu_private_state *dpu_priv_state;
@@ -619,7 +612,6 @@ static int dpu_encoder_virt_atomic_check(
ret = dpu_rm_reserve(&dpu_kms->rm, drm_enc,
&dpu_priv_state->base, topology, false);
- dpu_enc->mode_set_complete = false;
}
if (!ret)
@@ -1039,8 +1031,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
if (phys->ops.mode_set)
phys->ops.mode_set(phys, mode, adj_mode);
}
-
- dpu_enc->mode_set_complete = true;
}
static void _dpu_encoder_virt_enable_helper(struct drm_encoder *drm_enc)
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
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prev parent reply other threads:[~2019-02-14 1:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-14 1:52 [PATCH v2 0/4] reserve RM resources in private obj state Jeykumar Sankaran
[not found] ` <1550109142-28303-1-git-send-email-jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-02-14 1:52 ` [PATCH v2 1/4] drm/msm/dpu: add atomic private object to dpu crtc Jeykumar Sankaran
[not found] ` <1550109142-28303-2-git-send-email-jsanka-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2019-03-04 21:32 ` Sean Paul
2019-03-05 19:34 ` Jeykumar Sankaran
2019-03-05 20:18 ` [Freedreno] " Sean Paul
2019-02-14 1:52 ` [PATCH v2 2/4] drm/msm/dpu: track HW resources using private object state Jeykumar Sankaran
2019-02-14 1:52 ` [PATCH v2 3/4] drm/msm/dpu: remove reserve in encoder mode_set Jeykumar Sankaran
2019-02-14 1:52 ` Jeykumar Sankaran [this message]
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