From: Sandeep Maheswaram <sanm@codeaurora.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Stephen Boyd <swboyd@chromium.org>,
Doug Anderson <dianders@chromium.org>,
Matthias Kaehlcke <mka@chromium.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, Manu Gautam <mgautam@codeaurora.org>,
Sandeep Maheswaram <sanm@codeaurora.org>
Subject: [PATCH v5 6/9] phy: qcom-qusb2: Add new overriding tuning parameters in QUSB2 V2 PHY
Date: Mon, 9 Mar 2020 15:23:06 +0530 [thread overview]
Message-ID: <1583747589-17267-7-git-send-email-sanm@codeaurora.org> (raw)
In-Reply-To: <1583747589-17267-1-git-send-email-sanm@codeaurora.org>
Added support for overriding bias-ctrl-value,charge-ctrl-value and
hsdisc-trim-value params for QUSB2 V2 PHY
Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org>
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 51 +++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index 44841c9..3708d43 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -66,6 +66,14 @@
#define IMP_RES_OFFSET_MASK GENMASK(5, 0)
#define IMP_RES_OFFSET_SHIFT 0x0
+/* QUSB2PHY_PLL_BIAS_CONTROL_2 register bits */
+#define BIAS_CTRL2_RES_OFFSET_MASK GENMASK(5, 0)
+#define BIAS_CTRL2_RES_OFFSET_SHIFT 0x0
+
+/* QUSB2PHY_CHG_CONTROL_2 register bits */
+#define CHG_CTRL2_OFFSET_MASK GENMASK(5, 4)
+#define CHG_CTRL2_OFFSET_SHIFT 0x4
+
/* QUSB2PHY_PORT_TUNE1 register bits */
#define HSTX_TRIM_MASK GENMASK(7, 4)
#define HSTX_TRIM_SHIFT 0x4
@@ -73,6 +81,10 @@
#define PREEMPHASIS_EN_MASK GENMASK(1, 0)
#define PREEMPHASIS_EN_SHIFT 0x0
+/* QUSB2PHY_PORT_TUNE2 register bits */
+#define HSDISC_TRIM_MASK GENMASK(1, 0)
+#define HSDISC_TRIM_SHIFT 0x0
+
#define QUSB2PHY_PLL_ANALOG_CONTROLS_TWO 0x04
#define QUSB2PHY_PLL_CLOCK_INVERTERS 0x18c
#define QUSB2PHY_PLL_CMODE 0x2c
@@ -291,12 +303,18 @@ struct override_param {
* @hstx_trim: HSTX_TRIM to be updated in TUNE1 register
* @preemphasis: Amplitude Pre-Emphasis to be updated in TUNE1 register
* @preemphasis_width: half/full-width Pre-Emphasis updated via TUNE1
+ * @bias_ctrl: bias ctrl to be updated in BIAS_CONTROL_2 register
+ * @charge_ctrl: charge ctrl to be updated in CHG_CTRL2 register
+ * @hsdisc_trim: disconnect threshold to be updated in TUNE2 register
*/
struct override_params {
struct override_param imp_res_offset;
struct override_param hstx_trim;
struct override_param preemphasis;
struct override_param preemphasis_width;
+ struct override_param bias_ctrl;
+ struct override_param charge_ctrl;
+ struct override_param hsdisc_trim;
};
/**
@@ -409,6 +427,16 @@ static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy)
or->imp_res_offset.value << IMP_RES_OFFSET_SHIFT,
IMP_RES_OFFSET_MASK);
+ if (or->bias_ctrl.override)
+ qusb2_write_mask(qphy->base, QUSB2PHY_PLL_BIAS_CONTROL_2,
+ or->bias_ctrl.value << BIAS_CTRL2_RES_OFFSET_SHIFT,
+ BIAS_CTRL2_RES_OFFSET_MASK);
+
+ if (or->charge_ctrl.override)
+ qusb2_write_mask(qphy->base, QUSB2PHY_CHG_CTRL2,
+ or->charge_ctrl.value << CHG_CTRL2_OFFSET_SHIFT,
+ CHG_CTRL2_OFFSET_MASK);
+
if (or->hstx_trim.override)
qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE1],
or->hstx_trim.value << HSTX_TRIM_SHIFT,
@@ -430,6 +458,11 @@ static void qusb2_phy_override_phy_params(struct qusb2_phy *qphy)
cfg->regs[QUSB2PHY_PORT_TUNE1],
PREEMPH_WIDTH_HALF_BIT);
}
+
+ if (or->hsdisc_trim.override)
+ qusb2_write_mask(qphy->base, cfg->regs[QUSB2PHY_PORT_TUNE2],
+ or->hsdisc_trim.value << HSDISC_TRIM_SHIFT,
+ HSDISC_TRIM_MASK);
}
/*
@@ -879,6 +912,18 @@ static int qusb2_phy_probe(struct platform_device *pdev)
or->imp_res_offset.override = true;
}
+ if (!of_property_read_u32(dev->of_node, "qcom,bias-ctrl-value",
+ &value)) {
+ or->bias_ctrl.value = (u8)value;
+ or->bias_ctrl.override = true;
+ }
+
+ if (!of_property_read_u32(dev->of_node, "qcom,charge-ctrl-value",
+ &value)) {
+ or->charge_ctrl.value = (u8)value;
+ or->charge_ctrl.override = true;
+ }
+
if (!of_property_read_u32(dev->of_node, "qcom,hstx-trim-value",
&value)) {
or->hstx_trim.value = (u8)value;
@@ -897,6 +942,12 @@ static int qusb2_phy_probe(struct platform_device *pdev)
or->preemphasis_width.override = true;
}
+ if (!of_property_read_u32(dev->of_node, "qcom,hsdisc-trim-value",
+ &value)) {
+ or->hsdisc_trim.value = (u8)value;
+ or->hsdisc_trim.override = true;
+ }
+
pm_runtime_set_active(dev);
pm_runtime_enable(dev);
/*
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2020-03-09 9:54 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-09 9:53 [PATCH v5 0/9] Add QUSB2 PHY support for SC7180 Sandeep Maheswaram
2020-03-09 9:53 ` [PATCH v5 1/9] dt-bindings: phy: qcom,qusb2: Convert QUSB2 phy bindings to yaml Sandeep Maheswaram
2020-03-09 9:53 ` [PATCH v5 2/9] dt-bindings: phy: qcom,qusb2: Add compatibles for QUSB2 V2 phy and SC7180 Sandeep Maheswaram
2020-03-20 17:55 ` Rob Herring
2020-03-09 9:53 ` [PATCH v5 3/9] phy: qcom-qusb2: Add generic QUSB2 V2 PHY support Sandeep Maheswaram
2020-04-02 21:39 ` John Stultz
2020-04-02 22:37 ` [PATCH] phy: qcom-qusb2: Re add "qcom,sdm845-qusb2-phy" compat string John Stultz
2020-04-02 22:56 ` Doug Anderson
2020-04-02 23:08 ` John Stultz
2020-04-02 23:19 ` Doug Anderson
2020-04-02 23:54 ` John Stultz
2020-04-02 23:18 ` Bjorn Andersson
2020-04-02 23:01 ` Bjorn Andersson
2020-04-02 23:44 ` [PATCH v2] " John Stultz
2020-04-02 23:49 ` Doug Anderson
2020-04-08 2:56 ` Stephen Boyd
2020-04-02 22:58 ` [PATCH v5 3/9] phy: qcom-qusb2: Add generic QUSB2 V2 PHY support Doug Anderson
2020-03-09 9:53 ` [PATCH v5 4/9] dt-bindings: phy: qcom-qusb2: Add support for overriding Phy tuning parameters Sandeep Maheswaram
2020-03-09 9:53 ` [PATCH v5 5/9] phy: qcom-qusb2: Add support for overriding tuning parameters in QUSB2 V2 PHY Sandeep Maheswaram
2020-03-09 9:53 ` Sandeep Maheswaram [this message]
2020-03-09 9:53 ` [PATCH v5 7/9] arm64: dts: qcom: sc7180: Add generic QUSB2 V2 Phy compatible Sandeep Maheswaram
2020-03-09 9:53 ` [PATCH v5 8/9] arm64: dts: qcom: sdm845: " Sandeep Maheswaram
2020-04-06 23:48 ` Doug Anderson
2020-03-09 9:53 ` [PATCH v5 9/9] arm64: dts: qcom: sc7180: Update QUSB2 V2 Phy params for SC7180 IDP device Sandeep Maheswaram
2020-03-09 19:29 ` [PATCH v5 0/9] Add QUSB2 PHY support for SC7180 Bjorn Andersson
2020-03-20 6:05 ` Kishon Vijay Abraham I
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