From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
To: agross@kernel.org, bjorn.andersson@linaro.org,
robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Subject: [PATCH] arm64: dts: ipq8074: enable sdhci node
Date: Tue, 9 Jun 2020 17:05:11 +0530 [thread overview]
Message-ID: <1591702511-18571-1-git-send-email-sivaprak@codeaurora.org> (raw)
Enable mmc device found on ipq8074 devices
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 4 ++++
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 22 ++++++++++++++++++++++
2 files changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
index 6754cb0..390e8d2 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
@@ -82,3 +82,7 @@
nand-bus-width = <8>;
};
};
+
+&sdhc_1 {
+ status = "ok";
+};
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index 5303821..ba13b7b 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -169,6 +169,28 @@
#reset-cells = <0x1>;
};
+ sdhc_1: sdhci@7824900 {
+ compatible = "qcom,sdhci-msm-v4";
+ reg = <0x7824900 0x500>, <0x7824000 0x800>;
+ reg-names = "hc_mem", "core_mem";
+
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&xo>,
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&gcc GCC_SDCC1_APPS_CLK>;
+ clock-names = "xo", "iface", "core";
+ max-frequency = <384000000>;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+
+ status = "disabled";
+ };
+
blsp_dma: dma@7884000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x07884000 0x2b000>;
--
2.7.4
reply other threads:[~2020-06-09 11:35 UTC|newest]
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