[PATCH] pinctrl: qcom: sc7180: Make gpio28 non wakeup capable

Rajendra Nayak
2020-06-15T12:42:36Z

The PDC irqchip driver currently does not handle dual-edge interrupts,
and we have atleast one board with sc7180 designed to configure gpio28
as a dual-edge interrupt. This interrupt is however not expected to be
wakeup capable, so an easy way to fix this, seems to be to make this
gpio non wakeup capable and let TLMM handle it.

It would have been nice to be able to do this only for the particular
board with this design, however this change of removing gpio28 from the
pinctrl SoC file means we end up with one less wakeup capable gpio for
the entire SoC.

Reported-by: Jimmy Cheng-Yi Chiang <cychiang@google.com>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
---
drivers/pinctrl/qcom/pinctrl-sc7180.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-sc7180.c b/drivers/pinctrl/qcom/pinctrl-sc7180.c
index 1b6465a..3afcc01 100644
--- a/drivers/pinctrl/qcom/pinctrl-sc7180.c
+++ b/drivers/pinctrl/qcom/pinctrl-sc7180.c
@@ -1122,7 +1122,7 @@ static const struct msm_pingroup sc7180_groups[] = {
static const struct msm_gpio_wakeirq_map sc7180_pdc_map[] = {
{0, 40}, {3, 50}, {4, 42}, {5, 70}, {6, 41}, {9, 35},
{10, 80}, {11, 51}, {16, 20}, {21, 55}, {22, 90}, {23, 21},
- {24, 61}, {26, 52}, {28, 36}, {30, 100}, {31, 33}, {32, 81},
+ {24, 61}, {26, 52}, {30, 100}, {31, 33}, {32, 81},
{33, 62}, {34, 43}, {36, 91}, {37, 53}, {38, 63}, {39, 72},
{41, 101}, {42, 7}, {43, 34}, {45, 73}, {47, 82}, {49, 17},
{52, 109}, {53, 102}, {55, 92}, {56, 56}, {57, 57}, {58, 83},
--
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