From: Jeffrey Hugo <jhugo@codeaurora.org>
To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org,
bbhatt@codeaurora.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
Jeffrey Hugo <jhugo@codeaurora.org>
Subject: [PATCH] bus: mhi: core: fix potential operator-precedence with BHI macros
Date: Tue, 20 Oct 2020 14:29:45 -0600 [thread overview]
Message-ID: <1603225785-21368-1-git-send-email-jhugo@codeaurora.org> (raw)
The BHI_MSMHWID and BHI_OEMPKHASH macros take a value 'n' which is
a BHI register index. If 'n' is an expression rather than a simple
value, there can be an operator precedence issue which can result
in the incorrect calculation of the register offset. Adding
parentheses around the macro parameter can prevent such issues.
Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org>
---
drivers/bus/mhi/core/internal.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
index 7989269..78e4e84 100644
--- a/drivers/bus/mhi/core/internal.h
+++ b/drivers/bus/mhi/core/internal.h
@@ -153,8 +153,8 @@ extern struct bus_type mhi_bus_type;
#define BHI_SERIALNU (0x40)
#define BHI_SBLANTIROLLVER (0x44)
#define BHI_NUMSEG (0x48)
-#define BHI_MSMHWID(n) (0x4C + (0x4 * n))
-#define BHI_OEMPKHASH(n) (0x64 + (0x4 * n))
+#define BHI_MSMHWID(n) (0x4C + (0x4 * (n)))
+#define BHI_OEMPKHASH(n) (0x64 + (0x4 * (n)))
#define BHI_RSVD5 (0xC4)
#define BHI_STATUS_MASK (0xC0000000)
#define BHI_STATUS_SHIFT (30)
--
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.
next reply other threads:[~2020-10-20 20:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-20 20:29 Jeffrey Hugo [this message]
2020-10-21 16:33 ` [PATCH] bus: mhi: core: fix potential operator-precedence with BHI macros Hemant Kumar
2020-11-05 14:13 ` Manivannan Sadhasivam
2020-11-09 12:00 ` Manivannan Sadhasivam
2020-12-29 20:15 ` patchwork-bot+linux-arm-msm
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