From: Rob Herring <robh@kernel.org>
To: Conor Dooley <conor@kernel.org>
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Christophe Leroy <christophe.leroy@csgroup.eu>,
Rishabh Bhatnagar <rishabhb@codeaurora.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-arm-kernel@lists.infradead.org,
Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,
Rob Herring <robh+dt@kernel.org>,
Conor Dooley <conor.dooley@microchip.com>,
Masahiro Yamada <yamada.masahiro@socionext.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
linuxppc-dev@lists.ozlabs.org,
Serge Semin <fancer.lancer@gmail.com>,
Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Nicholas Piggin <npiggin@gmail.com>,
linux-kernel@vger.kernel.org,
Bjorn Andersson <andersson@kernel.org>,
Scott Wood <oss@buserror.net>,
linux-arm-msm@vger.kernel.org, Andy Gross <agross@kernel.org>,
Michael Ellerman <mpe@ellerman.id.au>,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org
Subject: Re: [PATCH v1] dt-bindings: move cache controller bindings to a cache directory
Date: Mon, 3 Apr 2023 16:40:22 -0500 [thread overview]
Message-ID: <168055794093.1918674.10704326537545829066.robh@kernel.org> (raw)
In-Reply-To: <20230330173255.109731-1-conor@kernel.org>
On Thu, 30 Mar 2023 18:32:56 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> There's a bunch of bindings for (mostly l2) cache controllers
> scattered to the four winds, move them to a common directory.
> I renamed the freescale l2cache.txt file, as while that might make sense
> when the parent dir is fsl, it's confusing after the move.
> The two Marvell bindings have had a "marvell," prefix added to match
> their compatibles.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../{memory-controllers => cache}/baikal,bt1-l2-ctl.yaml | 2 +-
> .../{powerpc/fsl/l2cache.txt => cache/freescale-l2cache.txt} | 0
> Documentation/devicetree/bindings/{arm => cache}/l2c2x0.yaml | 2 +-
> .../{arm/mrvl/feroceon.txt => cache/marvell,feroceon-cache.txt} | 0
> .../{arm/mrvl/tauros2.txt => cache/marvell,tauros2-cache.txt} | 0
> .../devicetree/bindings/{arm/msm => cache}/qcom,llcc.yaml | 2 +-
> .../devicetree/bindings/{riscv => cache}/sifive,ccache0.yaml | 2 +-
> .../socionext => cache}/socionext,uniphier-system-cache.yaml | 2 +-
> MAINTAINERS | 2 ++
> 9 files changed, 7 insertions(+), 5 deletions(-)
> rename Documentation/devicetree/bindings/{memory-controllers => cache}/baikal,bt1-l2-ctl.yaml (95%)
> rename Documentation/devicetree/bindings/{powerpc/fsl/l2cache.txt => cache/freescale-l2cache.txt} (100%)
> rename Documentation/devicetree/bindings/{arm => cache}/l2c2x0.yaml (99%)
> rename Documentation/devicetree/bindings/{arm/mrvl/feroceon.txt => cache/marvell,feroceon-cache.txt} (100%)
> rename Documentation/devicetree/bindings/{arm/mrvl/tauros2.txt => cache/marvell,tauros2-cache.txt} (100%)
> rename Documentation/devicetree/bindings/{arm/msm => cache}/qcom,llcc.yaml (96%)
> rename Documentation/devicetree/bindings/{riscv => cache}/sifive,ccache0.yaml (98%)
> rename Documentation/devicetree/bindings/{arm/socionext => cache}/socionext,uniphier-system-cache.yaml (96%)
>
Applied, thanks!
prev parent reply other threads:[~2023-04-03 21:45 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-30 17:32 [PATCH v1] dt-bindings: move cache controller bindings to a cache directory Conor Dooley
2023-04-03 21:40 ` Rob Herring [this message]
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