Linux ARM-MSM sub-architecture
 help / color / mirror / Atom feed
From: Can Guo <quic_cang@quicinc.com>
To: quic_cang@quicinc.com, bvanassche@acm.org, mani@kernel.org,
	adrian.hunter@intel.com, vkoul@kernel.org, beanhuo@micron.com,
	avri.altman@wdc.com, junwoo80.lee@samsung.com,
	martin.petersen@oracle.com
Cc: linux-scsi@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	"Bao D. Nguyen" <quic_nguyenb@quicinc.com>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	"James E.J. Bottomley" <jejb@linux.ibm.com>,
	linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v8 08/10] scsi: ufs: ufs-qcom: Add support for UFS device version detection
Date: Sat,  2 Dec 2023 04:36:14 -0800	[thread overview]
Message-ID: <1701520577-31163-9-git-send-email-quic_cang@quicinc.com> (raw)
In-Reply-To: <1701520577-31163-1-git-send-email-quic_cang@quicinc.com>

From: "Bao D. Nguyen" <quic_nguyenb@quicinc.com>

Start from HW ver 5, a spare register in UFS host controller is added and
used to indicate the UFS device version. The spare register is populated by
bootloader for now, but in future it will be populated by HW automatically
during link startup with its best efforts in any boot stage prior to Linux.

During host driver init, read the spare register, if it is not populated
with a UFS device version, go ahead with the dual init mechanism. If a UFS
device version is in there, use the UFS device version together with host
controller's HW version to decide the proper PHY gear which should be used
to configure the UFS PHY without going through the second init.

Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Signed-off-by: Can Guo <quic_cang@quicinc.com>
---

v7 -> v8:
Fixed a BUG introduced from v6 -> v7. The spare register is added since HW ver 5, hence exclude HW ver == 4.

---
 drivers/ufs/host/ufs-qcom.c | 35 ++++++++++++++++++++++++++++-------
 drivers/ufs/host/ufs-qcom.h |  4 ++++
 2 files changed, 32 insertions(+), 7 deletions(-)

diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
index ee3f07a..968a4c0 100644
--- a/drivers/ufs/host/ufs-qcom.c
+++ b/drivers/ufs/host/ufs-qcom.c
@@ -1065,17 +1065,38 @@ static void ufs_qcom_advertise_quirks(struct ufs_hba *hba)
 static void ufs_qcom_set_phy_gear(struct ufs_qcom_host *host)
 {
 	struct ufs_host_params *host_params = &host->host_params;
+	u32 val, dev_major;
 
 	host->phy_gear = host_params->hs_tx_gear;
 
-	/*
-	 * For controllers whose major HW version is < 4, power up the PHY using
-	 * minimum supported gear (UFS_HS_G2). Switching to max gear will be
-	 * performed during reinit if supported. For newer controllers, whose
-	 * major HW version is >= 4, power up the PHY using max supported gear.
-	 */
-	if (host->hw_ver.major < 0x4)
+	if (host->hw_ver.major < 0x4) {
+		/*
+		 * For controllers whose major HW version is < 4, power up the
+		 * PHY using minimum supported gear (UFS_HS_G2). Switching to
+		 * max gear will be performed during reinit if supported.
+		 * For newer controllers, whose major HW version is >= 4, power
+		 * up the PHY using max supported gear.
+		 */
 		host->phy_gear = UFS_HS_G2;
+	} else if (host->hw_ver.major >= 0x5) {
+		val = ufshcd_readl(host->hba, REG_UFS_DEBUG_SPARE_CFG);
+		dev_major = FIELD_GET(UFS_DEV_VER_MAJOR_MASK, val);
+
+		/*
+		 * Since the UFS device version is populated, let's remove the
+		 * REINIT quirk as the negotiated gear won't change during boot.
+		 * So there is no need to do reinit.
+		 */
+		if (dev_major != 0x0)
+			host->hba->quirks &= ~UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH;
+
+		/*
+		 * For UFS 3.1 device and older, power up the PHY using HS-G4
+		 * PHY gear to save power.
+		 */
+		if (dev_major > 0x0 && dev_major < 0x4)
+			host->phy_gear = UFS_HS_G4;
+	}
 }
 
 static void ufs_qcom_set_host_params(struct ufs_hba *hba)
diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h
index 11419eb..32e51d9 100644
--- a/drivers/ufs/host/ufs-qcom.h
+++ b/drivers/ufs/host/ufs-qcom.h
@@ -23,6 +23,8 @@
 #define UFS_HW_VER_MINOR_MASK	GENMASK(27, 16)
 #define UFS_HW_VER_STEP_MASK	GENMASK(15, 0)
 
+#define UFS_DEV_VER_MAJOR_MASK	GENMASK(7, 4)
+
 /* vendor specific pre-defined parameters */
 #define SLOW 1
 #define FAST 2
@@ -54,6 +56,8 @@ enum {
 	UFS_AH8_CFG				= 0xFC,
 
 	REG_UFS_CFG3				= 0x271C,
+
+	REG_UFS_DEBUG_SPARE_CFG			= 0x284C,
 };
 
 /* QCOM UFS host controller vendor specific debug registers */
-- 
2.7.4


  parent reply	other threads:[~2023-12-02 12:37 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-02 12:36 [PATCH v8 00/10] Enable HS-G5 support on SM8550 Can Guo
2023-12-02 12:36 ` [PATCH v8 01/10] scsi: ufs: host: Rename structure ufs_dev_params to ufs_host_params Can Guo
2023-12-04  2:53   ` Peter Wang (王信友)
2023-12-02 12:36 ` [PATCH v8 02/10] scsi: ufs: ufs-qcom: No need to set hs_rate after ufshcd_init_host_param() Can Guo
2023-12-02 12:36 ` [PATCH v8 03/10] scsi: ufs: ufs-qcom: Setup host power mode during init Can Guo
2023-12-02 12:36 ` [PATCH v8 04/10] scsi: ufs: ufs-qcom: Allow the first init start with the maximum supported gear Can Guo
2023-12-02 12:36 ` [PATCH v8 05/10] scsi: ufs: ufs-qcom: Limit HS-G5 Rate-A to hosts with HW version 5 Can Guo
2023-12-02 12:36 ` [PATCH v8 06/10] scsi: ufs: ufs-qcom: Set initial PHY gear to max HS gear for HW ver 4 and newer Can Guo
2023-12-02 12:36 ` [PATCH v8 07/10] scsi: ufs: ufs-qcom: Check return value of phy_set_mode_ext() Can Guo
2023-12-02 12:36 ` Can Guo [this message]
2023-12-07  7:55   ` [PATCH v8 08/10] scsi: ufs: ufs-qcom: Add support for UFS device version detection Manivannan Sadhasivam
2023-12-07  8:41   ` Nitin Rawat
2023-12-02 12:36 ` [PATCH v8 09/10] phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings Can Guo
2023-12-21 17:13   ` Vinod Koul
2023-12-22  7:41     ` Can Guo
2023-12-22 15:49       ` Vinod Koul
2023-12-02 12:36 ` [PATCH v8 10/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 Can Guo
2023-12-02 20:27   ` Dmitry Baryshkov
2023-12-07  8:22 ` [PATCH v8 00/10] Enable HS-G5 support on SM8550 neil.armstrong
2023-12-07  8:26   ` Can Guo
2023-12-14  3:44 ` Martin K. Petersen
2023-12-19  2:18 ` Martin K. Petersen
2023-12-21 17:15 ` (subset) " Vinod Koul

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1701520577-31163-9-git-send-email-quic_cang@quicinc.com \
    --to=quic_cang@quicinc.com \
    --cc=adrian.hunter@intel.com \
    --cc=agross@kernel.org \
    --cc=andersson@kernel.org \
    --cc=avri.altman@wdc.com \
    --cc=beanhuo@micron.com \
    --cc=bvanassche@acm.org \
    --cc=jejb@linux.ibm.com \
    --cc=junwoo80.lee@samsung.com \
    --cc=konrad.dybcio@linaro.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-scsi@vger.kernel.org \
    --cc=mani@kernel.org \
    --cc=martin.petersen@oracle.com \
    --cc=quic_nguyenb@quicinc.com \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox