Linux ARM-MSM sub-architecture
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From: Andrew Lunn <andrew@lunn.ch>
To: Yijie Yang <quic_yijiyang@quicinc.com>
Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Richard Cochran <richardcochran@gmail.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: qcs615-ride: Enable ethernet node
Date: Mon, 16 Dec 2024 10:18:54 +0100	[thread overview]
Message-ID: <174bd1a3-9faf-4850-b341-4a4cce1811cb@lunn.ch> (raw)
In-Reply-To: <581776bc-f3bc-44c1-b7c0-4c2e637fcd67@quicinc.com>

> I intend to follow these steps. Could you please check if they are correct?
> 1. Add a new flag in DTS to inform the MAC driver to include the delay when
> configured with 'rgmii-id'. Without this flag, the MAC driver will not be
> aware of the need for the delay.

Why do you need this flag?

If the phy-mode is rgmii-id, either the MAC or the PHY needs to add
the delay.

The MAC driver gets to see phy-mode first. If it wants to add the
delay, it can, but it needs to mask out the delays before passing
phy-mode to the PHY. If the MAC driver does not want to add the
delays, pass phy-mode as is the PHY, and it will add the delays.

There is nothing special here, every MAC/PHY pair does this, without
needing additional properties.

	Andrew

  reply	other threads:[~2024-12-16  9:19 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-18  6:44 [PATCH v2 0/2] Enable ethernet on qcs615 Yijie Yang
2024-11-18  6:44 ` [PATCH v2 1/2] arm64: dts: qcom: qcs615: add ethernet node Yijie Yang
2024-11-18  6:44 ` [PATCH v2 2/2] arm64: dts: qcom: qcs615-ride: Enable " Yijie Yang
2024-11-19  1:27   ` Andrew Lunn
2024-11-19 10:09     ` Yijie Yang
2024-11-22 12:27       ` Konrad Dybcio
2024-11-22 13:19         ` Andrew Lunn
2024-11-27  6:17           ` Yijie Yang
2024-11-27  7:00             ` Yijie Yang
2024-11-29 15:29               ` Andrew Lunn
2024-12-09  2:11                 ` Yijie Yang
2024-12-09  3:13                   ` Andrew Lunn
2024-12-10  3:29                     ` Yijie Yang
2024-12-10  4:09                       ` Andrew Lunn
2024-12-16  6:56                         ` Yijie Yang
2024-12-16  9:18                           ` Andrew Lunn [this message]
2024-12-17  2:26                             ` Yijie Yang
2024-12-17 10:18                               ` Andrew Lunn
2024-12-18  7:25                                 ` Yijie Yang
2024-12-18 16:57                                   ` Andrew Lunn
2024-11-29 15:15             ` Andrew Lunn

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