[PATCH] iommu/qcom: Fix pgsize_bitmap

[PATCH] iommu/qcom: Fix pgsize_bitmap

[Jason Gunthorpe]

qcom uses the ARM_32_LPAE_S1 format which uses the ARM long descriptor
page table. Eventually arm_32_lpae_alloc_pgtable_s1() will adjust
the pgsize_bitmap with:

	cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);

So the current declaration is nonsensical. Fix it to be just SZ_4K which
is what it has actually been using so far. Most likely the qcom driver
copy and pasted the pgsize_bitmap from something using the ARM_V7S format.

Fixes: db64591de4b2 ("iommu/qcom: Remove iommu_ops pgsize_bitmap")
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Closes: https://lore.kernel.org/all/CA+G9fYvif6kDDFar5ZK4Dff3XThSrhaZaJundjQYujaJW978yg@mail.gmail.com/
Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
---
 drivers/iommu/arm/arm-smmu/qcom_iommu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Joerg, can you pick this up for your core branch please

diff --git a/drivers/iommu/arm/arm-smmu/qcom_iommu.c b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
index 5891ad5de0d5e2..3163a23fcbaa4f 100644
--- a/drivers/iommu/arm/arm-smmu/qcom_iommu.c
+++ b/drivers/iommu/arm/arm-smmu/qcom_iommu.c
@@ -335,7 +335,7 @@ static struct iommu_domain *qcom_iommu_domain_alloc_paging(struct device *dev)
 
 	mutex_init(&qcom_domain->init_mutex);
 	spin_lock_init(&qcom_domain->pgtbl_lock);
-	qcom_domain->domain.pgsize_bitmap = SZ_4K | SZ_64K | SZ_1M | SZ_16M;
+	qcom_domain->domain.pgsize_bitmap = SZ_4K;
 
 	return &qcom_domain->domain;
 }

base-commit: 600b96ab916c09a60106c64ba7fbf60c301b98b9
-- 
2.43.0

Re: [PATCH] iommu/qcom: Fix pgsize_bitmap

[Konrad Dybcio]

On 7/11/25 3:16 PM, Jason Gunthorpe wrote:
> qcom uses the ARM_32_LPAE_S1 format which uses the ARM long descriptor
> page table. Eventually arm_32_lpae_alloc_pgtable_s1() will adjust
> the pgsize_bitmap with:
> 
> 	cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
> 
> So the current declaration is nonsensical. Fix it to be just SZ_4K which
> is what it has actually been using so far. Most likely the qcom driver
> copy and pasted the pgsize_bitmap from something using the ARM_V7S format.
> 
> Fixes: db64591de4b2 ("iommu/qcom: Remove iommu_ops pgsize_bitmap")
> Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
> Closes: https://lore.kernel.org/all/CA+G9fYvif6kDDFar5ZK4Dff3XThSrhaZaJundjQYujaJW978yg@mail.gmail.com/
> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
> ---

The downstream driver from >10y ago for this era of hardware
suggests (at least some?) users of this driver can issue a magic
TZ call to switch to (IIUC) ARM_64_LPAE_S1, but there's no
implementation upstream, so:

(adding a couple folks interested in the hardware museum to CC to
bring this to their attention, nothing to act on though)

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

Re: [PATCH] iommu/qcom: Fix pgsize_bitmap

[Will Deacon]

On Fri, 11 Jul 2025 10:16:38 -0300, Jason Gunthorpe wrote:
> qcom uses the ARM_32_LPAE_S1 format which uses the ARM long descriptor
> page table. Eventually arm_32_lpae_alloc_pgtable_s1() will adjust
> the pgsize_bitmap with:
> 
> 	cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
> 
> So the current declaration is nonsensical. Fix it to be just SZ_4K which
> is what it has actually been using so far. Most likely the qcom driver
> copy and pasted the pgsize_bitmap from something using the ARM_V7S format.
> 
> [...]

Applied to iommu (core), thanks!

[1/1] iommu/qcom: Fix pgsize_bitmap
      https://git.kernel.org/iommu/c/ced24bf4352c

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

Re: [PATCH] iommu/qcom: Fix pgsize_bitmap

[Konrad Dybcio]

On 7/11/25 3:26 PM, Konrad Dybcio wrote:
> On 7/11/25 3:16 PM, Jason Gunthorpe wrote:
>> qcom uses the ARM_32_LPAE_S1 format which uses the ARM long descriptor
>> page table. Eventually arm_32_lpae_alloc_pgtable_s1() will adjust
>> the pgsize_bitmap with:
>>
>> 	cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G);
>>
>> So the current declaration is nonsensical. Fix it to be just SZ_4K which
>> is what it has actually been using so far. Most likely the qcom driver
>> copy and pasted the pgsize_bitmap from something using the ARM_V7S format.
>>
>> Fixes: db64591de4b2 ("iommu/qcom: Remove iommu_ops pgsize_bitmap")
>> Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
>> Closes: https://lore.kernel.org/all/CA+G9fYvif6kDDFar5ZK4Dff3XThSrhaZaJundjQYujaJW978yg@mail.gmail.com/
>> Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
>> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
>> ---
> 
> The downstream driver from >10y ago for this era of hardware
> suggests (at least some?) users of this driver can issue a magic
> TZ call to switch to (IIUC) ARM_64_LPAE_S1, but there's no
> implementation upstream, so:
> 
> (adding a couple folks interested in the hardware museum to CC to
> bring this to their attention, nothing to act on though)
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

I never actually added the people I thought about to CC - fixing
that..

Konrad