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Fri, 10 Jan 2025 12:23:29 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50ACNS0I020463 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 10 Jan 2025 12:23:28 GMT Received: from [10.151.36.43] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 10 Jan 2025 04:23:24 -0800 Message-ID: <1964d238-d56a-b9ea-cda8-0b9ff32481cb@quicinc.com> Date: Fri, 10 Jan 2025 17:53:21 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH v4] dmaengine: qcom: bam_dma: Avoid writing unavailable register Content-Language: en-US To: Stephan Gerhold CC: , , , , , , , , , , , References: <20241220094203.3510335-1-quic_mdalam@quicinc.com> From: Md Sadre Alam In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 3InJ54gMHhgAsy2MbuEsm-8RdCr9pZ6H X-Proofpoint-ORIG-GUID: 3InJ54gMHhgAsy2MbuEsm-8RdCr9pZ6H X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 impostorscore=0 suspectscore=0 mlxscore=0 malwarescore=0 bulkscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501100096 On 1/10/2025 5:37 PM, Stephan Gerhold wrote: > On Fri, Jan 10, 2025 at 05:29:29PM +0530, Md Sadre Alam wrote: >> On 1/10/2025 3:59 PM, Stephan Gerhold wrote: >>> On Fri, Dec 20, 2024 at 03:12:03PM +0530, Md Sadre Alam wrote: >>>> Avoid writing unavailable register in BAM-Lite mode. >>>> BAM_DESC_CNT_TRSHLD register is unavailable in BAM-Lite >>>> mode. Its only available in BAM-NDP mode. So only write >>>> this register for clients who is using BAM-NDP. >>>> >>>> Signed-off-by: Md Sadre Alam >>> >>> What are we actually fixing here? Which platform is affected? Is there a >>> crash, reset, or incorrect behavior? >> On SDX75, QPIC use BAM-Lite and as per HW description this >> BAM_DESC_CNT_TRSHLD register is not available, and writing to this >> SDX75 was hanging. >>> >>> We have had this code for years without reported issues, with both >>> BAM-NDP and BAM-Lite instances. The register documentation on APQ8016E >>> documents the BAM_DESC_CNT_TRSHLD register even for the BAM-Lite >>> instance. There is a comment that it doesn't apply to BAM-Lite, but I >>> would expect the written value just ends up being ignored in that case. >> With older xPU it was being ignored but with new xPU its hanging. HW >> team suggested don't write this register for BAM-Lite mode since its not >> available. >>> > > OK, thanks for the explanation. > >>> Also, there is not just BAM-NDP and BAM-Lite, but also plain "BAM". What >>> about that one? Should we write to BAM_DESC_CNT_TRSHLD? >> Apart from BAM-Lite this register available in all the BAM > > Please check again if we need to check for additional revision numbers > for the non-NDP BAM types then. Or alternatively, change the check to > write the register on if (!BAM-Lite) instead of if (BAM-NDP). That might > be easier. Ok Thanks. will check once again this and post in next revision. > > Thanks, > Stephan