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Fri, 22 Nov 2024 16:55:52 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AMGtpxh007748 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 22 Nov 2024 16:55:51 GMT Received: from [10.216.6.133] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 22 Nov 2024 08:55:47 -0800 Message-ID: <1d9aa2e7-d402-42dc-baa6-155f01b132ca@quicinc.com> Date: Fri, 22 Nov 2024 22:25:44 +0530 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] clk: qcom: videocc: Use HW_CTRL_TRIGGER flag for video GDSC's To: Dmitry Baryshkov , Renjiang Han CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , , , , References: <20241122-switch_gdsc_mode-v1-0-365f097ecbb0@quicinc.com> <20241122-switch_gdsc_mode-v1-1-365f097ecbb0@quicinc.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eaOxrrqvuyjs49Wwwwrb61u_GvCdXa1i X-Proofpoint-ORIG-GUID: eaOxrrqvuyjs49Wwwwrb61u_GvCdXa1i X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 adultscore=0 clxscore=1011 impostorscore=0 suspectscore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 mlxlogscore=999 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411220142 On 11/22/2024 4:29 PM, Dmitry Baryshkov wrote: > On Fri, Nov 22, 2024 at 04:01:45PM +0530, Renjiang Han wrote: >> From: Taniya Das >> >> The video driver will be using the newly introduced > > 'will be' or 'is using'? Or will be using it for these platforms? Is > there any kind of dependency between two patches in the series? > The video driver will not be able to work without the clock side changes. >> dev_pm_genpd_set_hwmode() API to switch the video GDSC to HW and SW >> control modes at runtime. >> Hence use HW_CTRL_TRIGGER flag instead of HW_CTRL for video GDSC's for >> Qualcomm SoC SC7180 and SDM845. > > Is it applicable to any other platforms? Why did you select just these > two? > The V6 version of Video driver is already using them, now the video driver wants to migrate to v4 version of the HW to use the new flag. >> >> Signed-off-by: Taniya Das >> Signed-off-by: Renjiang Han >> --- >> drivers/clk/qcom/videocc-sc7180.c | 2 +- >> drivers/clk/qcom/videocc-sdm845.c | 4 ++-- >> 2 files changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/clk/qcom/videocc-sc7180.c b/drivers/clk/qcom/videocc-sc7180.c >> index d7f84548039699ce6fdd7c0f6675c168d5eaf4c1..dd2441d6aa83bd7cff17deeb42f5d011c1e9b134 100644 >> --- a/drivers/clk/qcom/videocc-sc7180.c >> +++ b/drivers/clk/qcom/videocc-sc7180.c >> @@ -166,7 +166,7 @@ static struct gdsc vcodec0_gdsc = { >> .pd = { >> .name = "vcodec0_gdsc", >> }, >> - .flags = HW_CTRL, >> + .flags = HW_CTRL_TRIGGER, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> diff --git a/drivers/clk/qcom/videocc-sdm845.c b/drivers/clk/qcom/videocc-sdm845.c >> index f77a0777947773dc8902c92098acff71b9b8f10f..6dedc80a8b3e18eca82c08a5bcd7e1fdc374d4b5 100644 >> --- a/drivers/clk/qcom/videocc-sdm845.c >> +++ b/drivers/clk/qcom/videocc-sdm845.c >> @@ -260,7 +260,7 @@ static struct gdsc vcodec0_gdsc = { >> }, >> .cxcs = (unsigned int []){ 0x890, 0x930 }, >> .cxc_count = 2, >> - .flags = HW_CTRL | POLL_CFG_GDSCR, >> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> @@ -271,7 +271,7 @@ static struct gdsc vcodec1_gdsc = { >> }, >> .cxcs = (unsigned int []){ 0x8d0, 0x950 }, >> .cxc_count = 2, >> - .flags = HW_CTRL | POLL_CFG_GDSCR, >> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR, >> .pwrsts = PWRSTS_OFF_ON, >> }; >> >> >> -- >> 2.34.1 >> > -- Thanks & Regards, Taniya Das.