From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lina Iyer Subject: Re: [PATCH v4 4/8] qcom: spm-devices: Add SPM device manager for the SoC Date: Wed, 27 Aug 2014 09:35:08 -0600 Message-ID: <20140827153508.GB74960@ilina-mac.local> References: <1408486537-6358-1-git-send-email-lina.iyer@linaro.org> <1408486537-6358-5-git-send-email-lina.iyer@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: Received: from mail-ig0-f174.google.com ([209.85.213.174]:38367 "EHLO mail-ig0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934491AbaH0PfN (ORCPT ); Wed, 27 Aug 2014 11:35:13 -0400 Received: by mail-ig0-f174.google.com with SMTP id c1so6410978igq.13 for ; Wed, 27 Aug 2014 08:35:11 -0700 (PDT) Content-Disposition: inline In-Reply-To: Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Kumar Gala Cc: daniel.lezcano@linaro.org, khilman@linaro.org, sboyd@codeaurora.org, davidb@codeaurora.org, linux-arm-msm@vger.kernel.org, lorenzo.pieralisi@arm.com, msivasub@codeaurora.org, Praveen Chidamabram , Murali Nalajala On Wed, Aug 27, 2014 at 09:00:40AM -0500, Kumar Gala wrote: > >On Aug 19, 2014, at 5:15 PM, Lina Iyer wrote: > >> Each cpu or an L2$ has an SPM device. They are identical instances o= f >> the same SPM block. This allows for multiple instances be grouped an= d >> managed collectively. spm-devices.c is the SPM device manager managi= ng >> multiple SPM devices on top of the driver layer. >> >> Device configuration of each SPM is picked up from the DTS. The hard= ware >> configuration of each of the SPM is handled by the spm.c driver. >> >> Signed-off-by: Praveen Chidamabram >> Signed-off-by: Murali Nalajala >> Signed-off-by: Lina Iyer >> --- >> Documentation/devicetree/bindings/arm/msm/spm.txt | 47 +++++ >> drivers/soc/qcom/Kconfig | 8 + >> drivers/soc/qcom/Makefile | 2 +- >> drivers/soc/qcom/spm-devices.c | 198 ++++++++++++= ++++++++++ >> include/soc/qcom/spm.h | 34 ++++ >> 5 files changed, 288 insertions(+), 1 deletion(-) >> create mode 100644 Documentation/devicetree/bindings/arm/msm/spm.txt >> create mode 100644 drivers/soc/qcom/spm-devices.c >> create mode 100644 include/soc/qcom/spm.h >> >> diff --git a/Documentation/devicetree/bindings/arm/msm/spm.txt b/Doc= umentation/devicetree/bindings/arm/msm/spm.txt >> new file mode 100644 >> index 0000000..318e024 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arm/msm/spm.txt >> @@ -0,0 +1,47 @@ >> +* Subsystem Power Manager (SAW2) >> + >> +S4 generation of MSMs have SPM hardware blocks to control the Appli= cation >> +Processor Sub-System power. These SPM blocks run individual state m= achine >> +to determine what the core (L2 or Krait/Scorpion) would do when the= WFI >> +instruction is executed by the core. >> + >> +The devicetree representation of the SPM block should be: >> + >> +Required properties >> + >> +- compatible: Could be one of - >> + "qcom,spm-v2.1" >> + "qcom,spm-v3.0" >> +- reg: The physical address and the size of the SPM's memory mapped= registers >> +- qcom,cpu: phandle for the CPU that the SPM block is attached to. >> + This field is required on only for SPMs that control the CPU. > >This should probably moved to optional since not ALL spm nodes would h= ave it. > OK. >> +- qcom,saw2-cfg: SAW2 configuration register >> +- qcom,saw2-spm-dly: Provides the values for the SPM delay command = in the SPM >> + sequence >> +- qcom,saw2-spm-ctl: The SPM control register > >Where is the code that uses "qcom,saw2-spm-dly=E2=80=9D & "qcom,saw2-s= pm-ctl" > Sorry. Updated the code, but not the documentation in this version. I noticed well after I sent the patch out. Will be fixed in the next revision. >> + >> +Optional properties >> + >> +- qcom,saw2-spm-cmd-wfi: The WFI command sequence >> +- qcom,saw2-spm-cmd-ret: The Retention command sequence >> +- qcom,saw2-spm-cmd-spc: The Standalone PC command sequence >> +- qcom,saw2-spm-cmd-pc: The Power Collapse command sequence. This s= equence may >> + turn off other SoC components. >> +- qcom,saw2-spm-cmd-gdhs: GDHS (Globally Distributed Head Switch) c= ommand >> + sequence. This sequence will retain the memory but turn off the lo= gic. >> +- >> +Example: >> + spm@f9089000 { >> + compatible =3D "qcom,spm-v2.1"; >> + #address-cells =3D <1>; >> + #size-cells =3D <1>; >> + reg =3D <0xf9089000 0x1000>; >> + qcom,cpu =3D <&CPU0>; >> + qcom,saw2-cfg =3D <0x1>; >> + qcom,saw2-spm-dly=3D <0x20000400>; >> + qcom,saw2-spm-ctl =3D <0x1>; >> + qcom,saw2-spm-cmd-wfi =3D [03 0b 0f]; >> + qcom,saw2-spm-cmd-spc =3D [00 20 50 80 60 70 10 92 >> + a0 b0 03 68 70 3b 92 a0 b0 >> + 82 2b 50 10 30 02 22 30 0f]; >> + }; >> diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig >> index 7dcd554..d467767 100644 >> --- a/drivers/soc/qcom/Kconfig >> +++ b/drivers/soc/qcom/Kconfig >> @@ -11,3 +11,11 @@ config QCOM_GSBI >> >> config QCOM_SCM >> bool >> + >> +config QCOM_PM >> + bool "Qualcomm Power Management" >> + depends on PM && ARCH_QCOM && OF > >ARCH_QCOM implies OF > OK. >> + help >> + QCOM Platform specific power driver to manage cores and L2 low p= ower >> + modes. It interface with various system drivers to put the cores= in >> + low power modes. >> > > > >> -- >> To unsubscribe from this list: send the line "unsubscribe linux-arm-= msm" in >> the body of a message to majordomo@vger.kernel.org >> More majordomo info at http://vger.kernel.org/majordomo-info.html > >--=20 >Employee of Qualcomm Innovation Center, Inc. >Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hos= ted by The Linux Foundation >