From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mike Turquette Subject: Re: [PATCH] clk: qcom: Fix sdc 144kHz frequency entry Date: Tue, 02 Sep 2014 16:52:49 -0700 Message-ID: <20140902235249.5251.32238@quantum> References: <1409341766-24366-1-git-send-email-sboyd@codeaurora.org> <20140902214402.5251.75274@quantum> <54063E2B.6090403@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <54063E2B.6090403@codeaurora.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, Andy Gross , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kumar Gala List-Id: linux-arm-msm@vger.kernel.org Quoting Stephen Boyd (2014-09-02 15:01:15) > On 09/02/14 14:44, Mike Turquette wrote: > > Quoting Stephen Boyd (2014-08-29 12:49:26) > >> The pre-divider for the sdc clocks only has 2 bits in it, so we > >> can't possibly divide by anything larger than 4 here. > >> Furthermore, we program the value of ~(n - m) and the n value is > >> larger than 8 bits (max of 256). Replace this entry with 200kHz > >> which is close enough to 144kHz to be usable. > >> > >> Cc: Kumar Gala > >> Cc: Andy Gross > >> Fixes: 24d8fba44af3 "clk: qcom: Add support for IPQ8064's global clock controller (GCC)" > >> Signed-off-by: Stephen Boyd > > Do you need this pulled into a 3.17-rc? > > > > Yes that would be helpful since this fixes a driver introduced into 3.17. Applied to clk-fixes. Thanks, Mike > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, > hosted by The Linux Foundation >