From mboxrd@z Thu Jan 1 00:00:00 1970 From: Courtney Cavin Subject: Re: [PATCH 9/9] ARM: dts: Model IPQ LPASS audio hardware Date: Wed, 19 Nov 2014 14:54:43 -0800 Message-ID: <20141119225443.GB13013@sonymobile.com> References: <1416423169-21865-1-git-send-email-kwestfie@codeaurora.org> <1416423169-21865-10-git-send-email-kwestfie@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Return-path: Received: from seldrel01.sonyericsson.com ([212.209.106.2]:6719 "EHLO seldrel01.sonyericsson.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756239AbaKSWvi (ORCPT ); Wed, 19 Nov 2014 17:51:38 -0500 Content-Disposition: inline In-Reply-To: <1416423169-21865-10-git-send-email-kwestfie@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Kenneth Westfield Cc: ALSA Mailing List , Device Tree Mailing List , MSM Mailing List , Mark Brown , Liam Girdwood , Takashi Iwai , Rob Herring , Greg KH , David Brown , Bryan Huntsman , Banajit Goswami , Patrick Lai On Wed, Nov 19, 2014 at 07:52:49PM +0100, Kenneth Westfield wrote: > From: Kenneth Westfield > > Model the LPASS audio hardware for the IPQ806X. > > Change-Id: Ide1aa0d09c23d4496aa9c40e3c9878a968261f11 As Kumar mentioned, please exclude this. > Signed-off-by: Kenneth Westfield > Signed-off-by: Banajit Goswami Typically, the order of these SoB should match some sort of chain of delivery: - The first should be the author of the patch - The last should match the email source (you) <-- doesn't seem to be the case > --- > arch/arm/boot/dts/qcom-ipq8064.dtsi | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi > index 63b2146f563b541e4994697af5ee1bbb41a4abd1..0e5b3b625f0442964aa7fbbc993c6c818fe99041 100644 > --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi > +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi > @@ -2,6 +2,7 @@ > > #include "skeleton.dtsi" > #include > +#include Neither this file nor an associated clock controller driver exists in mainline. Is there some other series this depends on? -Courtney