From: Lina Iyer <lina.iyer@linaro.org>
To: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Cc: Ohad Ben-Cohen <ohad@wizery.com>,
"linux-arm-msm@vger.kernel.org" <linux-arm-msm@vger.kernel.org>,
Jeffrey Hugo <jhugo@codeaurora.org>, Suman Anna <s-anna@ti.com>,
Andy Gross <agross@codeaurora.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v6 2/2] hwspinlock: qcom: Add support for Qualcomm HW Mutex block
Date: Wed, 18 Mar 2015 10:45:32 -0600 [thread overview]
Message-ID: <20150318164532.GD491@linaro.org> (raw)
In-Reply-To: <20150318155553.GX26334@sonymobile.com>
On Wed, Mar 18 2015 at 09:56 -0600, Bjorn Andersson wrote:
>On Thu 12 Mar 12:31 PDT 2015, Lina Iyer wrote:
>
>> On Fri, Feb 27 2015 at 15:30 -0700, Bjorn Andersson wrote:
>> >Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
>> >SoCs.
>> >
>> >Based on initial effort by Kumar Gala <galak@codeaurora.org>
>> >
>> >Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
>> >---
>> >
>>
>> [...]
>>
>> >+#include "hwspinlock_internal.h"
>> >+
>> >+#define QCOM_MUTEX_APPS_PROC_ID 1
>> Hi Bjorn,
>>
>> Not all locks use 1 to indicate its locked. For example lock index 7 is
>> used by cpuidle driver between HLOS and SCM. It uses a write value of
>> (128 + smp_processor_id()) to lock.
>>
>
>In other words, it's a magic number that will make sure that not more
>than one cpu enters TZ sleep code at a time.
>
Right, its a magic number of sorts.
>> A cpu acquires the remote spin lock, and calls into SCM to terminate the
>> power down sequence while passing the state of the L2. The lock help
>> guarantee the last core to hold the spinlock to have the most up to date
>> value for the L2 flush flag.
>>
>
>Yeah, I remember having to dig out the deadlock related to the
>introduction of that logic on my side (turned out to have an old TZ).
>
>There's already mutual exclusion and reference counting within TZ to
>make sure we're not turning off the caches unless this is the last core
>going down.
Yes, there is. But the perception of the last core in Linux and the last
core going down in TZ may be incorrect. Say for example, two cpus are
going down from linux - cpu0 & cpu1. cpu0 was the last core calling into
TZ from Linux and cpu1 had already done so. However, cpu1 started
handling an FIQ and therefore was blocked doing that while cpu0, went
through TZ. When each cpu calls into TZ, we provide the TZ with the L2
flush flag so as to allow TZ to also flush its secure lines before
powering the L2 down. The L2 flush flag that the cpu submits is its own
version of the system state. To get TZ to recognize the last valid l2
flush flag value from Linux, we need the hwmutex.
>I presume that the reason behind the hwmutex logic is to make sure that
>with multiple cores racing to sleep only one of them will flush the
>caches in Linux and will be the last entering TZ. Can you confirm this?
>
Its more for passing the flush flag than flushing the cache itself per-se.
>> >+#define QCOM_MUTEX_NUM_LOCKS 32
>>
>> Also, talking to Jeff it seems like that out of the 32 locks defined
>> only 8 is accessible from Linux. So its unnecessary and probably
>> incorrect to assume that there are 32 locks available.
>>
>
>The hardware block have 32 locks and the decision regarding which locks
>this particular Linux system is allowed to access is configuration.
>
Understood. But while the hardware may support it, it may be right for
Linux to be allowed to configure, giving a false sense of number of
locks.
>Regards,
>Bjorn
next prev parent reply other threads:[~2015-03-18 16:45 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-27 22:30 [PATCH v6 1/2] DT: hwspinlock: Add binding documentation for Qualcomm hwmutex Bjorn Andersson
2015-02-27 22:30 ` [PATCH v6 2/2] hwspinlock: qcom: Add support for Qualcomm HW Mutex block Bjorn Andersson
2015-03-11 21:09 ` Andy Gross
2015-03-12 19:31 ` Lina Iyer
2015-03-12 19:43 ` Andy Gross
2015-03-12 19:55 ` Lina Iyer
2015-03-18 16:10 ` Bjorn Andersson
2015-03-18 15:55 ` Bjorn Andersson
2015-03-18 16:45 ` Lina Iyer [this message]
2015-03-18 21:59 ` Bjorn Andersson
2015-03-12 19:38 ` [PATCH] Lock 7 is cpuidle specific, use non-generic value for locking Lina Iyer
2015-03-12 20:35 ` Stephen Boyd
2015-03-12 20:48 ` Lina Iyer
2015-03-12 21:12 ` Stephen Boyd
2015-03-12 22:16 ` Lina Iyer
2015-03-13 20:02 ` Andy Gross
2015-03-13 21:27 ` Lina Iyer
2015-03-12 20:49 ` Andy Gross
2015-03-12 20:56 ` Lina Iyer
2015-03-12 22:29 ` [PATCH v6 2/2] hwspinlock: qcom: Add support for Qualcomm HW Mutex block Lina Iyer
2015-03-18 16:12 ` Bjorn Andersson
2015-03-18 19:41 ` Lina Iyer
2015-03-16 22:38 ` Jeffrey Hugo
[not found] ` <1425076217-10415-1-git-send-email-bjorn.andersson-/MT0OVThwyLZJqsBc5GL+g@public.gmane.org>
2015-03-02 5:05 ` [PATCH v6 1/2] DT: hwspinlock: Add binding documentation for Qualcomm hwmutex Andy Gross
2015-04-14 19:18 ` Kumar Gala
2015-04-15 18:20 ` Ohad Ben-Cohen
2015-03-12 9:29 ` Ohad Ben-Cohen
2015-04-01 21:32 ` Tim Bird
2015-04-02 4:40 ` Ohad Ben-Cohen
2015-04-02 18:11 ` Tim Bird
[not found] ` <CA+bK7J6rXtF54Tp1+mkDbv8Hok88MVZeC+mLvjjGjzZ4KtTHEw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-04-03 13:55 ` Ohad Ben-Cohen
2015-04-06 16:22 ` Tim Bird
[not found] ` <CA+bK7J7OB2bbGna7y-O4egF-rhig-bdf1W5Uw+GG7F0VjDepUg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-04-06 16:31 ` Ohad Ben-Cohen
2015-04-06 16:48 ` Bjorn Andersson
2015-04-06 19:04 ` Ohad Ben-Cohen
2015-04-13 10:23 ` Ohad Ben-Cohen
2015-04-15 19:40 ` Rob Herring
[not found] ` <CAL_Jsq+GhhhoHgRDOkK4=oWtSVmvw=UpLoU-Ey5M7tdNi5OZ2Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-04-16 12:01 ` Mark Rutland
2015-03-12 9:51 ` Mark Rutland
2015-03-12 11:14 ` Bjorn Andersson
2015-03-16 22:35 ` Jeffrey Hugo
2015-04-16 11:52 ` Mark Rutland
-- strict thread matches above, loose matches on Subject: below --
2015-03-11 20:42 [PATCH v6 2/2] hwspinlock: qcom: Add support for Qualcomm HW, Mutex block Tim Bird
2015-03-11 22:15 ` Andy Gross
2015-03-12 8:16 ` Ohad Ben-Cohen
2015-03-12 15:26 ` Tim Bird
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150318164532.GD491@linaro.org \
--to=lina.iyer@linaro.org \
--cc=agross@codeaurora.org \
--cc=bjorn.andersson@sonymobile.com \
--cc=jhugo@codeaurora.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=ohad@wizery.com \
--cc=s-anna@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).