From: Stephen Boyd <sboyd@codeaurora.org>
To: Andy Gross <agross@codeaurora.org>
Cc: Kumar Gala <galak@codeaurora.org>,
Nicolas Dechesne <nicolas.dechesne@linaro.org>,
arm@kernel.org, Olof Johansson <olof@lixom.net>,
Arnd Bergmann <arnd@arndb.de>,
linux-arm-msm <linux-arm-msm@vger.kernel.org>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Lina Iyer <lina.iyer@linaro.org>,
Tyler Baker <tyler.baker@linaro.org>
Subject: Re: [GIT PULL] qcom SoC changes for v4.1
Date: Fri, 3 Apr 2015 11:40:09 -0700 [thread overview]
Message-ID: <20150403184009.GA18274@codeaurora.org> (raw)
In-Reply-To: <20150403162246.GA426@qualcomm.com>
On 04/03, Andy Gross wrote:
> On Thu, Apr 02, 2015 at 12:43:50PM -0700, Stephen Boyd wrote:
> > On 04/02/15 12:25, Kumar Gala wrote:
> > >> [1] http://kernelci.org/boot/all/job/arm-soc/kernel/v4.0-rc4-354-ga0690e6586df/
> > > I think we need to associated DT updates.
> > >
> > >
> >
> > What about this patch squashed on top? Just guessing but I suspect we
> > don't care about cell-index if we're not doing the tcsr stuff. Also, I
> > imagine we could get rid of cell-index entirely if we matched against
> > the address of the gsbi instead.
>
> Except that the GSBI5 base address changes from chip to chip.
>
>
Yep, for the cell-index removal part I was thinking we would make
another table per SoC like we already have for the TCSR part. The
table would map the physical address to the GSBI number.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
prev parent reply other threads:[~2015-04-03 18:40 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-16 21:03 [GIT PULL] qcom SoC changes for v4.1 Kumar Gala
2015-04-02 0:36 ` Olof Johansson
2015-04-02 8:37 ` Nicolas Dechesne
2015-04-02 19:25 ` Kumar Gala
2015-04-02 19:43 ` Stephen Boyd
2015-04-02 19:47 ` Nicolas Dechesne
2015-04-03 16:22 ` Andy Gross
2015-04-03 18:40 ` Stephen Boyd [this message]
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