From mboxrd@z Thu Jan  1 00:00:00 1970
From: Brian Norris <computersforpeace@gmail.com>
Subject: Re: [PATCH v4 2/5] mtd: nand: Qualcomm NAND controller driver
Date: Fri, 2 Oct 2015 10:31:31 -0700
Message-ID: <20151002173131.GF107187@google.com>
References: <1438578498-32254-1-git-send-email-architt@codeaurora.org>
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To: Archit Taneja <architt@codeaurora.org>
Cc: linux-mtd@lists.infradead.org, dehrenberg@google.com, cernekee@gmail.com, sboyd@codeaurora.org, linux-arm-msm@vger.kernel.org, agross@codeaurora.org, linux-kernel@vger.kernel.org
List-Id: linux-arm-msm@vger.kernel.org

One more nit noticed by my build tests:

On Wed, Aug 19, 2015 at 10:19:03AM +0530, Archit Taneja wrote:

[...]

> +static int qcom_nandc_ecc_init(struct qcom_nandc_data *this)
> +{
> +	struct mtd_info *mtd =3D &this->mtd;
> +	struct nand_chip *chip =3D &this->chip;
> +	struct nand_ecc_ctrl *ecc =3D &chip->ecc;
> +	int cwperpage;

drivers/mtd/nand/qcom_nandc.c: In function =E2=80=98qcom_nandc_ecc_init=
=E2=80=99:
drivers/mtd/nand/qcom_nandc.c:1517:6: warning: variable =E2=80=98cwperp=
age=E2=80=99 set but not used [-Wunused-but-set-variable]

> +	bool wide_bus;
> +
> +	/* the nand controller fetches codewords/chunks of 512 bytes */
> +	cwperpage =3D mtd->writesize >> 9;
> +
> +	ecc->strength =3D this->ecc_strength;
> +
> +	wide_bus =3D chip->options & NAND_BUSWIDTH_16 ? true : false;
> +
> +	if (ecc->strength >=3D 8) {
> +		/* 8 bit ECC defaults to BCH ECC on all platforms */
> +		ecc->bytes =3D wide_bus ? 14 : 13;
> +	} else {
> +		/*
> +		 * if the controller supports BCH for 4 bit ECC, the controller
> +		 * uses lesser bytes for ECC. If RS is used, the ECC bytes is
> +		 * always 10 bytes
> +		 */
> +		if (this->ecc_modes & ECC_BCH_4BIT)
> +			ecc->bytes =3D wide_bus ? 8 : 7;
> +		else
> +			ecc->bytes =3D 10;
> +	}
> +
> +	/* each step consists of 512 bytes of data */
> +	ecc->size =3D NANDC_STEP_SIZE;
> +
> +	ecc->read_page		=3D qcom_nandc_read_page;
> +	ecc->read_oob		=3D qcom_nandc_read_oob;
> +	ecc->write_page		=3D qcom_nandc_write_page;
> +	ecc->write_oob		=3D qcom_nandc_write_oob;
> +
> +	/*
> +	 * the bad block marker is readable only when we read the page with=
 ECC
> +	 * disabled. all the ops above run with ECC enabled. We need raw re=
ad
> +	 * and write function for oob in order to access bad block marker.
> +	 */
> +	ecc->read_oob_raw	=3D qcom_nandc_read_oob_raw;
> +	ecc->write_oob_raw	=3D qcom_nandc_write_oob_raw;
> +
> +	switch (mtd->oobsize) {
> +	case 64:
> +		ecc->layout =3D &layout_oob_64;
> +		break;
> +	case 128:
> +		ecc->layout =3D &layout_oob_128;
> +		break;
> +	case 224:
> +		if (wide_bus)
> +			ecc->layout =3D &layout_oob_224_x16;
> +		else
> +			ecc->layout =3D &layout_oob_224_x8;
> +		break;
> +	case 256:
> +		ecc->layout =3D &layout_oob_256;
> +		break;
> +	default:
> +		dev_err(this->dev, "unsupported NAND device, oobsize %d\n",
> +			mtd->oobsize);
> +		return -ENODEV;
> +	}
> +
> +	ecc->mode =3D NAND_ECC_HW;
> +
> +	/* enable ecc by default */
> +	this->use_ecc =3D true;
> +
> +	return 0;
> +}

[...]

Brian