From: Bjorn Helgaas <helgaas@kernel.org>
To: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
Rob Herring <robh+dt@kernel.org>, Rob Herring <robh@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Arnd Bergmann <arnd@arndb.de>, Jingoo Han <jingoohan1@gmail.com>,
Pratyush Anand <pratyush.anand@gmail.com>,
Bjorn Andersson <bjorn.andersson@sonymobile.com>
Subject: Re: [PATCH v4 3/5] PCI: qcom: Add Qualcomm PCIe controller driver
Date: Thu, 17 Dec 2015 15:15:25 -0600 [thread overview]
Message-ID: <20151217211525.GA4129@localhost> (raw)
In-Reply-To: <5672B633.6030503@linaro.org>
On Thu, Dec 17, 2015 at 03:18:43PM +0200, Stanimir Varbanov wrote:
> Bjorn, thanks for the comments!
>
> On 12/16/2015 11:53 PM, Bjorn Helgaas wrote:
> > On Thu, Dec 03, 2015 at 03:35:22PM +0200, Stanimir Varbanov wrote:
> >> From: Stanimir Varbanov <svarbanov@mm-sol.com>
> >>
> >> The PCIe driver reuse the Designware common code for host
> >> and MSI initialization, and also program the Qualcomm
> >> application specific registers.
> >>
> >> Signed-off-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> >> Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
> >> ---
> >> MAINTAINERS | 7 +
> >> drivers/pci/host/Kconfig | 10 +
> >> drivers/pci/host/Makefile | 1 +
> >> drivers/pci/host/pcie-qcom.c | 624 ++++++++++++++++++++++++++++++++++++++++++
> >
> >> +#define PCIE20_CAP 0x70
> >> +#define PCIE20_CAP_LINKCTRLSTATUS (PCIE20_CAP + 0x10)
> >> +#define PCIE20_CAP_LINKCTRLSTATUS_LINK_UP BIT(29)
> >
> > This looks like it could be referring to a standard PCIe Capability;
> > could you use the existing PCI_EXP_LNKSTA and PCI_EXP_LNKSTA_DLLLA
> > symbols here? And readw() instead of readl()?
>
> Yes, that is possible but I still need to keep PCIE20_CAP capabilities
> offset.
Great, thanks! I think that will help keep generic PCIe things from
looking like they're special implementation-specific things.
Bjorn
next prev parent reply other threads:[~2015-12-17 21:15 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-03 13:35 [PATCH v4 0/5] Qualcomm PCIe driver and designware fixes Stanimir Varbanov
2015-12-03 13:35 ` [PATCH v4 1/5] PCI: designware: add memory barrier after enabling region Stanimir Varbanov
2015-12-08 9:01 ` Stanimir Varbanov
2015-12-09 4:40 ` Pratyush Anand
2015-12-09 9:52 ` Arnd Bergmann
2015-12-09 10:29 ` Stanimir Varbanov
2015-12-09 10:23 ` Russell King - ARM Linux
2015-12-11 4:05 ` Pratyush Anand
2015-12-11 5:48 ` Jisheng Zhang
2015-12-22 12:36 ` Jingoo Han
2015-12-17 15:45 ` Stanimir Varbanov
2015-12-17 15:51 ` Pratyush Anand
2015-12-03 13:35 ` [PATCH v4 3/5] PCI: qcom: Add Qualcomm PCIe controller driver Stanimir Varbanov
2015-12-15 8:24 ` Stanimir Varbanov
2015-12-16 21:17 ` Bjorn Helgaas
2015-12-16 21:53 ` Bjorn Helgaas
2015-12-17 13:18 ` Stanimir Varbanov
2015-12-17 21:15 ` Bjorn Helgaas [this message]
[not found] ` <1449149725-27607-1-git-send-email-stanimir.varbanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-12-03 13:35 ` [PATCH v4 2/5] DT: PCI: qcom: Document PCIe devicetree bindings Stanimir Varbanov
2015-12-03 20:42 ` Rob Herring
2015-12-03 13:35 ` [PATCH v4 4/5] ARM: dts: apq8064: add pcie devicetree node Stanimir Varbanov
2015-12-03 13:35 ` [PATCH v4 5/5] ARM: dts: ifc6410: enable pcie dt node for this board Stanimir Varbanov
[not found] ` <1449149725-27607-6-git-send-email-stanimir.varbanov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-12-17 21:55 ` Bjorn Andersson
2015-12-18 9:57 ` Stanimir Varbanov
2015-12-07 17:33 ` [PATCH v4 0/5] Qualcomm PCIe driver and designware fixes Srinivas Kandagatla
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