From: Stephen Boyd <sboyd@codeaurora.org>
To: Rajendra Nayak <rnayak@codeaurora.org>
Cc: mturquette@baylibre.com, linux-clk@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
tdas@codeaurora.org
Subject: Re: [PATCH v2 01/10] clk: Fix inconsistencies in usage of data types
Date: Fri, 12 Aug 2016 17:59:52 -0700 [thread overview]
Message-ID: <20160813005952.GG361@codeaurora.org> (raw)
In-Reply-To: <1470904858-11930-2-git-send-email-rnayak@codeaurora.org>
On 08/11, Rajendra Nayak wrote:
> index is of type u8 in all places except in clk_hw_get_parent_by_index()
> and return value of all round_rate functions is long except for
> clk_hw_round_rate(). Make them consistent with the rest of the places
>
> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
> ---
> drivers/clk/clk.c | 4 ++--
> include/linux/clk-provider.h | 5 ++---
> 2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 820a939..e768071 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -261,7 +261,7 @@ static struct clk_core *clk_core_get_parent_by_index(struct clk_core *core,
> }
>
> struct clk_hw *
> -clk_hw_get_parent_by_index(const struct clk_hw *hw, unsigned int index)
> +clk_hw_get_parent_by_index(const struct clk_hw *hw, u8 index)
I guess this is ok, but u8 seems limiting for no reason and we
may want to expand the parent array at some point in the future
(although it would be a huge change). So I'd like to leave this
alone. Inconsistent as it is.
> {
> struct clk_core *parent;
>
> @@ -889,7 +889,7 @@ int __clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req)
> }
> EXPORT_SYMBOL_GPL(__clk_determine_rate);
>
> -unsigned long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
> +long clk_hw_round_rate(struct clk_hw *hw, unsigned long rate)
> {
> int ret;
> struct clk_rate_request req;
This function should never return a negative value, so the return
type is unsigned.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-08-13 0:59 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-11 8:40 [PATCH v2 00/10] clk: qcom: PLL updates Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 01/10] clk: Fix inconsistencies in usage of data types Rajendra Nayak
2016-08-13 0:59 ` Stephen Boyd [this message]
2016-08-11 8:40 ` [PATCH v2 02/10] clk: qcom: Add support for alpha pll hwfsm ops Rajendra Nayak
2016-08-24 6:13 ` Stephen Boyd
2016-08-25 9:05 ` Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 03/10] clk: qcom: Add support to initialize alpha plls Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 04/10] clk: qcom: Add support for PLLs with alpha mode Rajendra Nayak
2016-08-24 6:15 ` Stephen Boyd
2016-08-25 9:12 ` Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 05/10] clk: qcom: Add support for PLLs with early output Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 06/10] clk: qcom: Add support for PLLs supporting dynamic reprogramming Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 07/10] clk: qcom: Add support to enable FSM mode for votable alpha PLLs Rajendra Nayak
2016-08-24 6:31 ` Stephen Boyd
2016-08-25 9:16 ` Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 08/10] clk: qcom: Cleanup some macro defs Rajendra Nayak
2016-08-13 0:57 ` Stephen Boyd
2016-08-11 8:40 ` [PATCH v2 09/10] clk: qcom: Add .is_enabled ops for clk-alpha-pll Rajendra Nayak
2016-08-24 6:28 ` Stephen Boyd
2016-08-25 9:15 ` Rajendra Nayak
2016-08-11 8:40 ` [PATCH v2 10/10] clk: qcom: Fix .set_rate to handle alpha PLLs w/wo dynamic update Rajendra Nayak
2016-08-24 6:26 ` Stephen Boyd
2016-08-25 9:13 ` Rajendra Nayak
2016-08-24 6:17 ` [PATCH v2 00/10] clk: qcom: PLL updates Stephen Boyd
2016-08-25 9:17 ` Rajendra Nayak
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