* [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset
@ 2016-08-25 11:20 Srinivas Kandagatla
2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
2016-08-25 20:02 ` [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Stephen Boyd
0 siblings, 2 replies; 4+ messages in thread
From: Srinivas Kandagatla @ 2016-08-25 11:20 UTC (permalink / raw)
To: Stephen Boyd
Cc: Andy Gross, David Brown, Michael Turquette, linux-arm-msm,
linux-clk, linux-kernel, Srinivas Kandagatla
This patch corrects the register offset for pcie2 pipe clock.
Offset according to datasheet is 0x6e018 instead of 0x6e108.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/gcc-msm8996.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index a1ef12f..456b2f4 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2592,9 +2592,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
};
static struct clk_branch gcc_pcie_2_pipe_clk = {
- .halt_reg = 0x6e108,
+ .halt_reg = 0x6e018,
.clkr = {
- .enable_reg = 0x6e108,
+ .enable_reg = 0x6e018,
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_pcie_2_pipe_clk",
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines
2016-08-25 11:20 [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Srinivas Kandagatla
@ 2016-08-25 11:20 ` Srinivas Kandagatla
2016-08-25 20:03 ` Stephen Boyd
2016-08-25 20:02 ` [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Stephen Boyd
1 sibling, 1 reply; 4+ messages in thread
From: Srinivas Kandagatla @ 2016-08-25 11:20 UTC (permalink / raw)
To: Stephen Boyd
Cc: Andy Gross, David Brown, Michael Turquette, linux-arm-msm,
linux-clk, linux-kernel, Srinivas Kandagatla
This patch adds missing 2 PCIE common reset lines.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
drivers/clk/qcom/gcc-msm8996.c | 2 ++
include/dt-bindings/clock/qcom,gcc-msm8996.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 456b2f4..993b0ed 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -3404,6 +3404,8 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = {
[GCC_PCIE_2_BCR] = { 0x6e000 },
[GCC_PCIE_2_PHY_BCR] = { 0x6e038 },
[GCC_PCIE_PHY_BCR] = { 0x6f000 },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6f014 },
+ [GCC_PCIE_PHY_COM_NOCSR_BCR] = { 0x6f00c },
[GCC_DCD_BCR] = { 0x70000 },
[GCC_OBT_ODT_BCR] = { 0x73000 },
[GCC_UFS_BCR] = { 0x75000 },
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8996.h b/include/dt-bindings/clock/qcom,gcc-msm8996.h
index 6f814db..b7ea1e8 100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8996.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8996.h
@@ -335,6 +335,9 @@
#define GCC_MSMPU_BCR 98
#define GCC_MSS_Q6_BCR 99
#define GCC_QREFS_VBG_CAL_BCR 100
+#define GCC_PCIE_PHY_COM_BCR 101
+#define GCC_PCIE_PHY_COM_NOCSR_BCR 102
+
/* Indexes for GDSCs */
#define AGGRE0_NOC_GDSC 0
--
2.7.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset
2016-08-25 11:20 [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Srinivas Kandagatla
2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
@ 2016-08-25 20:02 ` Stephen Boyd
1 sibling, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2016-08-25 20:02 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: Andy Gross, David Brown, Michael Turquette, linux-arm-msm,
linux-clk, linux-kernel
On 08/25, Srinivas Kandagatla wrote:
> This patch corrects the register offset for pcie2 pipe clock.
> Offset according to datasheet is 0x6e018 instead of 0x6e108.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines
2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
@ 2016-08-25 20:03 ` Stephen Boyd
0 siblings, 0 replies; 4+ messages in thread
From: Stephen Boyd @ 2016-08-25 20:03 UTC (permalink / raw)
To: Srinivas Kandagatla
Cc: Andy Gross, David Brown, Michael Turquette, linux-arm-msm,
linux-clk, linux-kernel
On 08/25, Srinivas Kandagatla wrote:
> This patch adds missing 2 PCIE common reset lines.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
^ permalink raw reply [flat|nested] 4+ messages in thread
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2016-08-25 11:20 [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Srinivas Kandagatla
2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
2016-08-25 20:03 ` Stephen Boyd
2016-08-25 20:02 ` [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Stephen Boyd
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