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* [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset
@ 2016-08-25 11:20 Srinivas Kandagatla
  2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
  2016-08-25 20:02 ` [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Stephen Boyd
  0 siblings, 2 replies; 4+ messages in thread
From: Srinivas Kandagatla @ 2016-08-25 11:20 UTC (permalink / raw)
  To: Stephen Boyd
  Cc: Andy Gross, David Brown, Michael Turquette, linux-arm-msm,
	linux-clk, linux-kernel, Srinivas Kandagatla

This patch corrects the register offset for pcie2 pipe clock.
Offset according to datasheet is 0x6e018 instead of 0x6e108.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 drivers/clk/qcom/gcc-msm8996.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index a1ef12f..456b2f4 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2592,9 +2592,9 @@ static struct clk_branch gcc_pcie_2_aux_clk = {
 };
 
 static struct clk_branch gcc_pcie_2_pipe_clk = {
-	.halt_reg = 0x6e108,
+	.halt_reg = 0x6e018,
 	.clkr = {
-		.enable_reg = 0x6e108,
+		.enable_reg = 0x6e018,
 		.enable_mask = BIT(0),
 		.hw.init = &(struct clk_init_data){
 			.name = "gcc_pcie_2_pipe_clk",
-- 
2.7.4

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end of thread, other threads:[~2016-08-25 20:03 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2016-08-25 11:20 [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Srinivas Kandagatla
2016-08-25 11:20 ` [PATCH 2/2] clk: gcc-msm8996: add missing pcie phy reset lines Srinivas Kandagatla
2016-08-25 20:03   ` Stephen Boyd
2016-08-25 20:02 ` [PATCH 1/2] clk: gcc-msm8996: Fix pcie 2 pipe register offset Stephen Boyd

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