From: Iaroslav Gridin <voker57@gmail.com>
To: Andy Gross <andy.gross@linaro.org>
Cc: david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,
linux@armlinux.org.uk, linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] ARM: dts: msm8974: Add definitions for QCE & cryptobam
Date: Fri, 16 Sep 2016 14:59:15 +0300 [thread overview]
Message-ID: <20160916115915.7zuaai6rxha32g6j@localhost> (raw)
In-Reply-To: <20160915211842.GB5431@hector.attlocal.net>
On Thu, Sep 15, 2016 at 04:18:42PM -0500, Andy Gross wrote:
> Actually, on thinking about this more, the bam block itself only
> requires the
> single clock. The peripheral it is attached to has to keep its sanity
> during
> the duration of the transfer (crypto). The crypto requires 3 clocks,
> one of
> which is the same clk the bam requires.
>
> You can access the BAM registers with the bam_clk only, correct?
No, with only bam_clk board reboots. In fact, core_clk is the only
required one.
> The CLK_SRC is unnecessary. Or should be at least. That gets turned
> on by
> getting the CE2_CLK. I vaguely remember a parent issue that was
> fixed.
Yes, I thought it was required to change its speed to achieve maximum
QCE performance but as it have been pointed out, same adjustment on core
clock does the same.
next prev parent reply other threads:[~2016-09-16 11:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-30 15:37 [PATCH] ARM: dts: msm8974: Add definitions for QCE & cryptobam Iaroslav Gridin
2016-09-07 13:09 ` Stanimir Varbanov
2016-09-07 16:20 ` Iaroslav Gridin
2016-09-17 0:10 ` Stephen Boyd
2016-09-13 3:51 ` Bjorn Andersson
2016-09-15 21:18 ` Andy Gross
2016-09-16 11:59 ` Iaroslav Gridin [this message]
2016-09-16 17:38 ` Iaroslav Gridin
2016-09-16 18:50 ` Andy Gross
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