From: Stephen Boyd <sboyd@codeaurora.org>
To: Abhishek Sahu <absahu@codeaurora.org>
Cc: andy.gross@linaro.org, david.brown@linaro.org,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, mturquette@baylibre.com,
galak@codeaurora.org, pradeepb@codeaurora.org,
mmcclint@codeaurora.org, varada@codeaurora.org,
sricharan@codeaurora.org, architt@codeaurora.org,
ntelkar@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v3 6/7] clk: qcom: ipq4019: changed the frequency value for ddr pll
Date: Tue, 1 Nov 2016 18:27:51 -0700 [thread overview]
Message-ID: <20161102012751.GF16026@codeaurora.org> (raw)
In-Reply-To: <1474460512-31994-7-git-send-email-absahu@codeaurora.org>
On 09/21, Abhishek Sahu wrote:
> diff --git a/drivers/clk/qcom/gcc-ipq4019.c b/drivers/clk/qcom/gcc-ipq4019.c
> index b2decd5..a2809db 100644
> --- a/drivers/clk/qcom/gcc-ipq4019.c
> +++ b/drivers/clk/qcom/gcc-ipq4019.c
> @@ -546,7 +546,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk[] = {
> F(25000000, P_FEPLL500, 1, 1, 20),
> F(50000000, P_FEPLL500, 1, 1, 10),
> F(100000000, P_FEPLL500, 1, 1, 5),
> - F(190000000, P_DDRPLL, 1, 0, 0),
> + F(192000000, P_DDRPLL, 1, 0, 0),
Change from 193 to 190 to 192.... please do it once.
> { }
> };
>
> @@ -567,18 +567,18 @@ static struct clk_rcg2 sdcc1_apps_clk_src = {
> static const struct freq_tbl ftbl_gcc_apps_clk[] = {
> F(48000000, P_XO, 1, 0, 0),
> F(200000000, P_FEPLL200, 1, 0, 0),
> - F(380000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(409000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(444000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(484000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(384000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(413000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(448000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(488000000, P_DDRPLLAPSS, 1, 0, 0),
> F(500000000, P_FEPLL500, 1, 0, 0),
> - F(507000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(532000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(560000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(592000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(626000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(666000000, P_DDRPLLAPSS, 1, 0, 0),
> - F(710000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(512000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(537000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(565000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(597000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(632000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(672000000, P_DDRPLLAPSS, 1, 0, 0),
> + F(716000000, P_DDRPLLAPSS, 1, 0, 0),
Didn't this patch series introduce table updates already? Why
can't this patch be squashed with that one?
> { }
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2016-11-02 1:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-21 12:21 [PATCH v3 0/7] Patches for QCOM IPQ4019 clock driver Abhishek Sahu
2016-09-21 12:21 ` [PATCH v3 1/7] clk: qcom: ipq4019: Added the clock nodes and operations for pll Abhishek Sahu
2016-11-02 1:22 ` Stephen Boyd
2016-09-21 12:21 ` [PATCH v3 2/7] clk: qcom: ipq4019: Added the apss cpu pll divider clock node Abhishek Sahu
[not found] ` <1474460512-31994-1-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-09-21 12:21 ` [PATCH v3 3/7] clk: qcom: ipq4019: Added the nodes for pcnoc Abhishek Sahu
2016-09-21 12:21 ` [PATCH v3 4/7] clk: qcom: ipq4019: Added all the frequencies for apps cpu Abhishek Sahu
[not found] ` <1474460512-31994-5-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2016-11-02 1:24 ` Stephen Boyd
2016-11-24 12:46 ` Abhishek Sahu
2016-09-21 12:21 ` [PATCH v3 5/7] clk: qcom: ipq4019: corrected sdcc frequency and parent name Abhishek Sahu
2016-11-02 1:26 ` Stephen Boyd
2016-09-21 12:21 ` [PATCH v3 6/7] clk: qcom: ipq4019: changed the frequency value for ddr pll Abhishek Sahu
2016-11-02 1:27 ` Stephen Boyd [this message]
2016-09-21 12:21 ` [PATCH v3 7/7] clk: qcom: ipq4019: changed i2c freq table Abhishek Sahu
2016-11-02 1:29 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161102012751.GF16026@codeaurora.org \
--to=sboyd@codeaurora.org \
--cc=absahu@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=architt@codeaurora.org \
--cc=david.brown@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=ijc+devicetree@hellion.org.uk \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-soc@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mmcclint@codeaurora.org \
--cc=mturquette@baylibre.com \
--cc=ntelkar@codeaurora.org \
--cc=pawel.moll@arm.com \
--cc=pradeepb@codeaurora.org \
--cc=robh+dt@kernel.org \
--cc=sricharan@codeaurora.org \
--cc=varada@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).