From: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
To: Sricharan <sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
mathieu.poirier-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
will.deacon-5wv7dgnIgG8@public.gmane.org,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH V2 1/3] iommu/arm-smmu: Add pm_runtime/sleep ops
Date: Wed, 8 Feb 2017 11:40:02 +0000 [thread overview]
Message-ID: <20170208114002.GD15459@leverpostej> (raw)
In-Reply-To: <017701d281f9$927c5fb0$b7751f10$@codeaurora.org>
On Wed, Feb 08, 2017 at 04:23:17PM +0530, Sricharan wrote:
> >On Thu, Feb 02, 2017 at 10:40:18PM +0530, Sricharan R wrote:
> >> +- clock-names: Should be a pair of "smmu_iface_clk" and "smmu_bus_clk"
> >> + required for smmu's register group access and interface
> >> + clk for the smmu's underlying bus access.
> >> +
> >> +- clocks: Phandles for respective clocks described by clock-names.
> >
> >Which SMMU implementations are those clock-names valid for?
> >
> >The SMMU architecture specifications do not architect the clocks, which
> >are implemementation-specific.
> >
> >AFAICT, this doesn't match MMU-400 or MMU-500.
>
> Ok, should be more specific. Infact QCOM has MMU-500 and also
> a smmu v2 implementation which is fully compatible with
> "arm,smmu-v2", with the clocks being controlled by the soc's
> clock controller. i was trying to define these clock bindings
> so that its works across socs.
I don't think we can do that, if we don't know precisely what those
clocks are used for.
i.e. we'd need a compatible string for the QCOM SMMUv2 variant, which
would imply the set of clocks.
> So there are one or more interface clocks which are required for the
> smmu's interface or the configuration access and one or more clocks
> required for smmu's downstream bus access. That was the reason i was
> trying to iterate over the list of clocks down below. But agree that
> the bindings should define each of the clocks required separately.
As above, I don't think the code should do this. It should only touch
the clocks it knows about.
> So one way here is, define a separate compatible for QCOM's SMMU
> implementation and define all the clock bindings as a part of it
> and handle it in the same way in the driver.
That would be my preference.
> But just thinking if it would scale well for any other soc that is
> compatible with arm,smmu-v2 driver and wants to handle clocks in the
> future ?
I don't think we can have our cake and eat it here. Either we handle the
clock management for each variant, or we don't do it at all. We have no
idea what requirements a future variant might have w.r.t. the management
of clocks we don't know about yet.
Thanks,
Mark.
next prev parent reply other threads:[~2017-02-08 11:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-02 17:10 [PATCH V2 0/3] iommu/arm-smmu: Add runtime pm/sleep support Sricharan R
2017-02-02 17:10 ` [PATCH V2 2/3] iommu/arm-smmu: Invoke pm_runtime during probe, add/remove device Sricharan R
[not found] ` <1486055420-19671-1-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-02 17:10 ` [PATCH V2 1/3] iommu/arm-smmu: Add pm_runtime/sleep ops Sricharan R
[not found] ` <1486055420-19671-2-git-send-email-sricharan-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-02-02 17:42 ` Mark Rutland
2017-02-08 10:53 ` Sricharan
2017-02-08 11:40 ` Mark Rutland [this message]
2017-02-08 12:30 ` Sricharan
2017-02-08 12:54 ` Robin Murphy
[not found] ` <b55359d8-2665-aef0-3215-53a0e8f21bcd-5wv7dgnIgG8@public.gmane.org>
2017-02-08 13:45 ` Sricharan
2017-02-08 13:52 ` Mark Rutland
2017-02-08 14:30 ` Robin Murphy
[not found] ` <db9bc01c-635d-1a57-8a6c-9be19a0cda16-5wv7dgnIgG8@public.gmane.org>
2017-02-09 13:35 ` Sricharan
2017-02-02 17:10 ` [PATCH V2 3/3] iommu/arm-smmu: Add the device_link between masters and smmu Sricharan R
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