From: Stephen Boyd <sboyd@codeaurora.org>
To: Rob Clark <robdclark@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, Andy Gross <agross@codeaurora.org>,
Stanimir Varbanov <stanimir.varbanov@linaro.org>
Subject: Re: [PATCH 3/3] ARM64: DT: add iommu for msm8916
Date: Tue, 30 May 2017 17:14:35 -0700 [thread overview]
Message-ID: <20170531001435.GR20170@codeaurora.org> (raw)
In-Reply-To: <20170525174822.27996-4-robdclark@gmail.com>
On 05/25, Rob Clark wrote:
> + apps_iommu: iommu@1ef0000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #iommu-cells = <1>;
> + compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
> + ranges = <0 0x1e20000 0x40000>;
> + reg = <0x1ef0000 0x3000>;
> + clocks = <&gcc GCC_SMMU_CFG_CLK>,
> + <&gcc GCC_APSS_TCU_CLK>;
> + clock-names = "iface", "bus";
> + qcom,iommu-secure-id = <17>;
> +
> + // mdp_0:
> + iommu-ctx@4000 {
> + compatible = "qcom,msm-iommu-v1-ns";
> + reg = <0x4000 0x1000>;
> + interrupts = <GIC_SPI 70 0>;
s/0/IRQ_TYPE_LEVEL_HIGH/
> + };
> +
> + // venus_ns:
> + iommu-ctx@5000 {
> + compatible = "qcom,msm-iommu-v1-sec";
> + reg = <0x5000 0x1000>;
> + interrupts = <GIC_SPI 70 0>;
s/0/IRQ_TYPE_LEVEL_HIGH/
Is it the same interrupt number (70) twice? Not 71 or something?
> + };
> + };
> +
> + gpu_iommu: iommu@1f08000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #iommu-cells = <1>;
> + compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
> + ranges = <0 0x1f08000 0x10000>;
> + clocks = <&gcc GCC_SMMU_CFG_CLK>,
> + <&gcc GCC_GFX_TCU_CLK>;
> + clock-names = "iface", "bus";
> + qcom,iommu-secure-id = <18>;
> +
> + // gfx3d_user:
> + iommu-ctx@1000 {
> + compatible = "qcom,msm-iommu-v1-ns";
> + reg = <0x1000 0x1000>;
> + interrupts = <GIC_SPI 241 0>;
s/0/IRQ_TYPE_LEVEL_HIGH/
> + };
> +
> + // gfx3d_priv:
> + iommu-ctx@2000 {
> + compatible = "qcom,msm-iommu-v1-ns";
> + reg = <0x2000 0x1000>;
> + interrupts = <GIC_SPI 242 0>;
s/0/IRQ_TYPE_LEVEL_HIGH/
> + };
> + };
> +
> gpu_opp_table: opp_table {
> compatible = "operating-points-v2";
>
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-05-31 0:14 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-25 17:48 [PATCH 0/3] gpu + venus + iommu dt nodes for msm8916 Rob Clark
2017-05-25 17:48 ` [PATCH 1/3] ARM64: DT: add gpu " Rob Clark
2017-05-31 0:11 ` Stephen Boyd
2017-05-25 17:48 ` [PATCH 2/3] ARM64: DT: add video codec devicetree node Rob Clark
2017-05-25 17:48 ` [PATCH 3/3] ARM64: DT: add iommu for msm8916 Rob Clark
2017-05-31 0:14 ` Stephen Boyd [this message]
2017-05-31 11:58 ` Rob Clark
2017-05-31 16:14 ` Stephen Boyd
-- strict thread matches above, loose matches on Subject: below --
2017-06-12 12:43 [PATCH 1/3] ARM64: DT: add gpu " Rob Clark
2017-06-12 12:43 ` [PATCH 3/3] ARM64: DT: add iommu " Rob Clark
2017-06-13 2:12 ` Stephen Boyd
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