From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH 12/13] clk: qcom: support for 2 bit PLL post divider Date: Fri, 8 Dec 2017 16:18:16 -0800 Message-ID: <20171209001816.GC7997@codeaurora.org> References: <1506621050-10129-1-git-send-email-absahu@codeaurora.org> <1506621050-10129-13-git-send-email-absahu@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Received: from smtp.codeaurora.org ([198.145.29.96]:51034 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752960AbdLIASR (ORCPT ); Fri, 8 Dec 2017 19:18:17 -0500 Content-Disposition: inline In-Reply-To: <1506621050-10129-13-git-send-email-absahu@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org To: Abhishek Sahu Cc: Michael Turquette , Andy Gross , David Brown , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org On 09/28, Abhishek Sahu wrote: > Current PLL driver only supports 4 bit PLL post divider so > modified the PLL divider operations to support 2 bit PLL > post divider. > > Signed-off-by: Abhishek Sahu > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project