From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH 06/13] clk: qcom: flag for 64 bit CONFIG_CTL Date: Fri, 8 Dec 2017 16:18:49 -0800 Message-ID: <20171209001849.GI7997@codeaurora.org> References: <1506621050-10129-1-git-send-email-absahu@codeaurora.org> <1506621050-10129-7-git-send-email-absahu@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: <1506621050-10129-7-git-send-email-absahu@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org To: Abhishek Sahu Cc: Michael Turquette , Andy Gross , David Brown , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org List-Id: linux-arm-msm@vger.kernel.org On 09/28, Abhishek Sahu wrote: > Some of the Alpha PLL’s (like Spark, Brammo PLL) do not have > CONFIG_CTL_U register. This patch adds the flag in properties > for PLL’s which have CONFIG_CTL_U register and checks the same > while doing PLL initial configuration. > > Signed-off-by: Abhishek Sahu > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project