Re: [PATCH RFC 0/4] irqchip: qcom: add support for PDC interrupt controller

[Lina Iyer <ilina@codeaurora.org>]

On Tue, Jan 23 2018 at 18:15 +0000, Sudeep Holla wrote:
>Hi Lina,
>
>On Tue, Jan 23, 2018 at 5:56 PM, Lina Iyer <ilina@codeaurora.org> wrote:
>> On newer Qualcomm Techonologies Inc's SoCs like the SDM845, the GIC is in a
>> power domain that can be powered off when not needed. Interrupts that need to
>> be sensed even when the GIC is powered off, are routed through an interrupt
>> controller in an always-on domain called the Power Domain Controller a.k.a PDC.
>> This series adds support for the PDC's interrupt controller.
>>
>
>Sorry for the basic questions:
>
>1. Will the GIC be powered off in any other state other than System suspend ?
>
Yes. When all the CPUs are in idle, there is an opportunity to power off
the CPU's power domain and the GIC. QCOM SoCs have been doing that for
many generations now.

>2. Why this needs to be done in Linux, why can't it be transparent and hidden
>    in the firmware doing the actual GIC power down ? I assume Linux is not
>    powering down the GIC.
No. You are right, Linux is not powering off the GIC directly. A
dedicated processor for power management in the SoC does that. Platform
drivers in Linux, know and configure the wakeup interrupts (depending on
the usecase). This is runtime specific and this is the way to tell the
SoC to wake up the processor even if the GIC and the CPU domain were
powered off.

>
>3. I see some bits that enable secure interrupts in one of the patch.
>Is that even
>    safe to allow Linux to enable some secure interrupts in PDC ?
>
Linux should not and would not configure secure interrupts. We would not
have permissions for secure interrupts. The interrupt names might be a
misnomer, but the interrupts listed in patch #4 are all non-secure
interrupts.

Thanks,
Lina