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From: Jordan Crouse <jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	tfiga-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH 06/14] iommu: arm-smmu: Add side-band function to specific pasid callbacks
Date: Wed, 21 Feb 2018 15:59:16 -0700	[thread overview]
Message-ID: <20180221225924.30737-7-jcrouse@codeaurora.org> (raw)
In-Reply-To: <20180221225924.30737-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>

Just allowing a client driver to create and manage a
a software pasid isn't interesting if the client driver doesn't have
enough information about the pagetable to be able to use it. Add a
side band function for arm-smmu that lets the client device register
pasid operations to pass the relevant pagetable information to the
client driver whenever a new pasid is created or destroyed

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 drivers/iommu/arm-smmu.c | 40 ++++++++++++++++++++++++++++++++++++++++
 include/linux/arm-smmu.h | 18 ++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 include/linux/arm-smmu.h

diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 42f5bfa3e26e..81c781705e22 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -50,6 +50,7 @@
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/spinlock.h>
+#include <linux/arm-smmu.h>
 
 #include <linux/amba/bus.h>
 
@@ -253,6 +254,8 @@ struct arm_smmu_domain {
 
 	spinlock_t			pasid_lock;
 	struct list_head		pasid_list;
+	const struct arm_smmu_pasid_ops	*pasid_ops;
+	void				*pasid_data;
 };
 
 struct arm_smmu_option_prop {
@@ -294,6 +297,10 @@ static void arm_smmu_pasid_free(struct iommu_domain *domain, int pasid)
 	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
 	struct arm_smmu_pasid *node, *obj = NULL;
 
+	if (smmu_domain->pasid_ops && smmu_domain->pasid_ops->remove_pasid)
+		smmu_domain->pasid_ops->remove_pasid(pasid,
+			smmu_domain->pasid_data);
+
 	spin_lock(&smmu_domain->pasid_lock);
 	list_for_each_entry(node, &smmu_domain->pasid_list, node) {
 		if (node->pasid == pasid) {
@@ -386,6 +393,26 @@ static int arm_smmu_pasid_alloc(struct iommu_domain *domain, struct device *dev,
 	obj->domain = domain;
 	obj->pasid = pasid;
 
+	if (smmu_domain->pasid_ops && smmu_domain->pasid_ops->install_pasid) {
+		int ret;
+		u64 ttbr;
+
+		if (smmu_domain->cfg.fmt == ARM_SMMU_CTX_FMT_AARCH32_S)
+			ttbr = pgtbl_cfg.arm_v7s_cfg.ttbr[0];
+		else
+			ttbr = pgtbl_cfg.arm_lpae_s1_cfg.ttbr[0];
+
+		ret = smmu_domain->pasid_ops->install_pasid(pasid, ttbr,
+			smmu_domain->cfg.asid, smmu_domain->pasid_data);
+
+		if (ret) {
+			free_io_pgtable_ops(obj->pgtbl_ops);
+			kfree(obj);
+
+			return ret;
+		}
+	}
+
 	spin_lock(&smmu_domain->pasid_lock);
 	list_add_tail(&obj->node, &smmu_domain->pasid_list);
 	spin_unlock(&smmu_domain->pasid_lock);
@@ -2046,6 +2073,19 @@ static int arm_smmu_device_cfg_probe(struct arm_smmu_device *smmu)
 	return 0;
 }
 
+void arm_smmu_add_pasid_ops(struct iommu_domain *domain,
+	const struct arm_smmu_pasid_ops *ops, void *data)
+{
+	struct arm_smmu_domain *smmu_domain;
+
+	if (domain) {
+		smmu_domain = to_smmu_domain(domain);
+		smmu_domain->pasid_ops = ops;
+		smmu_domain->pasid_data = data;
+	}
+}
+EXPORT_SYMBOL_GPL(arm_smmu_add_pasid_ops);
+
 struct arm_smmu_match_data {
 	enum arm_smmu_arch_version version;
 	enum arm_smmu_implementation model;
diff --git a/include/linux/arm-smmu.h b/include/linux/arm-smmu.h
new file mode 100644
index 000000000000..c14ca52231bf
--- /dev/null
+++ b/include/linux/arm-smmu.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
+
+#ifndef ARM_SMMU_H_
+#define ARM_SMMU_H_
+
+struct iommu_domain;
+
+struct arm_smmu_pasid_ops {
+	int (*install_pasid)(int pasid, u64 ttbr, u32 asid, void *data);
+	void (*remove_pasid)(int pasid, void *data);
+};
+
+
+void arm_smmu_add_pasid_ops(struct iommu_domain *domain,
+	const struct arm_smmu_pasid_ops *ops, void *data);
+
+#endif
-- 
2.16.1

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  parent reply	other threads:[~2018-02-21 22:59 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-21 22:59 [RFC 00/14] Per-instance pagetables for MSM GPUs Jordan Crouse
     [not found] ` <20180221225924.30737-1-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-02-21 22:59   ` [PATCH 01/14] iommu: Add DOMAIN_ATTR_ENABLE_TTBR1 Jordan Crouse
     [not found]     ` <20180221225924.30737-2-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-02 14:56       ` Robin Murphy
2018-02-21 22:59   ` [PATCH 02/14] iommu/arm-smmu: Add support for TTBR1 Jordan Crouse
     [not found]     ` <20180221225924.30737-3-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-02 17:57       ` Robin Murphy
     [not found]         ` <155a85ea-1c66-ce0b-06b3-d3933d6f54df-5wv7dgnIgG8@public.gmane.org>
2018-03-02 18:28           ` Jordan Crouse
2018-02-21 22:59   ` [PATCH 03/14] iommu: Create a base struct for io_mm Jordan Crouse
     [not found]     ` <20180221225924.30737-4-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-02 12:25       ` Jean-Philippe Brucker
     [not found]         ` <fddafdae-4384-4826-ef63-9075e9866ae9-5wv7dgnIgG8@public.gmane.org>
2018-03-02 16:14           ` Jordan Crouse
2018-02-21 22:59   ` [PATCH 04/14] iommu: sva: Add support for pasid allocation Jordan Crouse
     [not found]     ` <20180221225924.30737-5-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-02 12:27       ` Jean-Philippe Brucker
     [not found]         ` <b71fefa1-2fdf-f14f-9e7a-0e525a103049-5wv7dgnIgG8@public.gmane.org>
2018-03-02 16:23           ` Jordan Crouse
2018-02-21 22:59   ` [PATCH 05/14] iommu: arm-smmu: Add pasid implementation Jordan Crouse
2018-02-21 22:59   ` Jordan Crouse [this message]
2018-02-21 22:59   ` [PATCH 07/14] drm/msm: Enable 64 bit mode by default Jordan Crouse
2018-02-21 22:59   ` [PATCH 08/14] drm/msm: Pass the MMU domain index in struct msm_file_private Jordan Crouse
2018-02-21 22:59   ` [PATCH 09/14] drm/msm/gpu: Support using TTBR1 for kernel buffer objects Jordan Crouse
2018-02-21 22:59   ` [PATCH 10/14] drm/msm: Add msm_mmu features Jordan Crouse
2018-02-21 22:59   ` [PATCH 11/14] drm/msm: Add support for iommu-sva PASIDs Jordan Crouse
     [not found]     ` <20180221225924.30737-12-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2018-03-02 12:29       ` Jean-Philippe Brucker
2018-02-21 22:59   ` [PATCH 12/14] drm/msm: Add support for per-instance address spaces Jordan Crouse
2018-02-21 22:59   ` [PATCH 13/14] drm/msm: Support " Jordan Crouse
2018-02-21 22:59   ` [PATCH 14/14] drm/msm/a5xx: Support per-instance pagetables Jordan Crouse

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