From: James Hogan <jhogan@kernel.org>
To: Sinan Kaya <okaya@codeaurora.org>
Cc: linux-mips@linux-mips.org, arnd@arndb.de, timur@codeaurora.org,
sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 2/2] MIPS: io: add a barrier after register read in readX()
Date: Sat, 14 Apr 2018 00:52:18 +0100 [thread overview]
Message-ID: <20180413235217.GA19138@saruman> (raw)
In-Reply-To: <d1f91bcc-4523-e8fb-2f16-4a5932460d44@codeaurora.org>
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On Thu, Apr 12, 2018 at 10:33:42PM -0400, Sinan Kaya wrote:
> On 4/12/2018 10:30 PM, Sinan Kaya wrote:
> > + /* prevent prefetching of coherent DMA dma prematurely */ \
>
> I tried to write DMA data but my keyboard is not cooperating. I'll hold onto
> posting another version until I hear back from you for wmb().
No problem, I've applied both for 4.17 and tweaked the comment.
Thanks
James
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prev parent reply other threads:[~2018-04-13 23:52 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-04-13 2:30 [PATCH v4 1/2] MIPS: io: prevent compiler reordering on the default writeX() implementation Sinan Kaya
2018-04-13 2:30 ` [PATCH v4 2/2] MIPS: io: add a barrier after register read in readX() Sinan Kaya
2018-04-13 2:33 ` Sinan Kaya
2018-04-13 23:52 ` James Hogan [this message]
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