From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Westerberg Subject: Re: [PATCH] PCI: pciehp: Add quirk for QDF2400 Command Completed erratum Date: Mon, 7 May 2018 15:43:49 +0300 Message-ID: <20180507124349.GC2879@lahna.fi.intel.com> References: <1525602662-1873-1-git-send-email-okaya@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1525602662-1873-1-git-send-email-okaya@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org To: Sinan Kaya Cc: linux-pci@vger.kernel.org, timur@codeaurora.org, sulrich@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, Bjorn Helgaas , Greg Kroah-Hartman , Kees Cook , Markus Elfring , Keith Busch , Lukas Wunner , open list List-Id: linux-arm-msm@vger.kernel.org On Sun, May 06, 2018 at 06:30:53AM -0400, Sinan Kaya wrote: > The QDF2400 controller does not set the Command Completed bit unless > writes to the Slot Command register change "Control" bits. Command > Completed is never set for writes that only change software notification > "Enable" bits. This results in timeouts like this: > > pciehp 0000:00:00.0:pcie004: Timeout on hotplug command 0x1038 > > Cc: stable@vger.kernel.org > Signed-off-by: Sinan Kaya Reviewed-by: Mika Westerberg