From: Sean Paul <sean@poorly.run>
To: Abhinav Kumar <abhinavk@codeaurora.org>
Cc: ryadav@codeaurora.org, linux-arm-msm@vger.kernel.org,
dri-devel@lists.freedesktop.org, seanpaul@chromium.org,
hoegsberg@google.com, chandanu@codeaurora.org
Subject: Re: [DPU PATCH] drm/msm/dsi: configure VCO rate for 10nm PLL driver
Date: Mon, 8 Oct 2018 13:55:36 -0400 [thread overview]
Message-ID: <20181008175536.GD154160@art_vandelay> (raw)
In-Reply-To: <1529035270-32513-1-git-send-email-abhinavk@codeaurora.org>
On Thu, Jun 14, 2018 at 09:01:10PM -0700, Abhinav Kumar wrote:
> Currenty the VCO rate in the 10nm PLL driver relies
> on the parent rate which is not configured.
>
> Configure the VCO rate to 19.2 Mhz as required by
> the 10nm PLL driver.
>
> Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
Sorry for missing this when it was posted. This is consistent with the other
files in pll/, so
Reviewed-by: Sean Paul <seanpaul@chromium.org>
I'll stuff this in dpu-staging/for-next.
Sean
> ---
> drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> index c4c37a7..fb485cb 100644
> --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
> @@ -39,6 +39,8 @@
> #define DSI_PIXEL_PLL_CLK 1
> #define NUM_PROVIDED_CLKS 2
>
> +#define VCO_REF_CLK_RATE 19200000
> +
> struct dsi_pll_regs {
> u32 pll_prop_gain_rate;
> u32 pll_lockdet_rate;
> @@ -316,7 +318,7 @@ static int dsi_pll_10nm_vco_set_rate(struct clk_hw *hw, unsigned long rate,
> parent_rate);
>
> pll_10nm->vco_current_rate = rate;
> - pll_10nm->vco_ref_clk_rate = parent_rate;
> + pll_10nm->vco_ref_clk_rate = VCO_REF_CLK_RATE;
>
> dsi_pll_setup_config(pll_10nm);
>
> --
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>
--
Sean Paul, Software Engineer, Google / Chromium OS
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prev parent reply other threads:[~2018-10-08 17:55 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-15 4:01 [DPU PATCH] drm/msm/dsi: configure VCO rate for 10nm PLL driver Abhinav Kumar
2018-10-08 17:55 ` Sean Paul [this message]
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