From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jonathan Marek Subject: [PATCH 3/9] drm/msm/mdp4: add lcdc-align-lsb flag to control lane alignment Date: Wed, 14 Nov 2018 17:24:10 -0500 Message-ID: <20181114222418.15960-3-jonathan@marek.ca> References: <20181114222418.15960-1-jonathan@marek.ca> Return-path: In-Reply-To: <20181114222418.15960-1-jonathan@marek.ca> Sender: linux-kernel-owner@vger.kernel.org To: freedreno@lists.freedesktop.org Cc: Rob Clark , David Airlie , Sean Paul , Boris Brezillon , Thierry Reding , "open list:DRM DRIVER FOR MSM ADRENO GPU" , "open list:DRM DRIVER FOR MSM ADRENO GPU" , open list List-Id: linux-arm-msm@vger.kernel.org Controls which of the 8 lanes are used for 6 bit color. Signed-off-by: Jonathan Marek --- .../gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 22 ++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c index e19ab2ab63f7..7d8d11c8150a 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c @@ -377,20 +377,26 @@ static void mdp4_lcdc_encoder_enable(struct drm_encoder *encoder) unsigned long pc = mdp4_lcdc_encoder->pixclock; struct mdp4_kms *mdp4_kms = get_kms(encoder); struct drm_panel *panel; + uint32_t config; int i, ret; if (WARN_ON(mdp4_lcdc_encoder->enabled)) return; /* TODO: hard-coded for 18bpp: */ - mdp4_crtc_set_config(encoder->crtc, - MDP4_DMA_CONFIG_R_BPC(BPC6) | - MDP4_DMA_CONFIG_G_BPC(BPC6) | - MDP4_DMA_CONFIG_B_BPC(BPC6) | - MDP4_DMA_CONFIG_PACK_ALIGN_MSB | - MDP4_DMA_CONFIG_PACK(0x21) | - MDP4_DMA_CONFIG_DEFLKR_EN | - MDP4_DMA_CONFIG_DITHER_EN); + config = + MDP4_DMA_CONFIG_R_BPC(BPC6) | + MDP4_DMA_CONFIG_G_BPC(BPC6) | + MDP4_DMA_CONFIG_B_BPC(BPC6) | + MDP4_DMA_CONFIG_PACK(0x21) | + MDP4_DMA_CONFIG_DEFLKR_EN | + MDP4_DMA_CONFIG_DITHER_EN; + + if (!of_find_property(dev->dev->of_node, "lcdc-align-lsb", NULL)) + config |= MDP4_DMA_CONFIG_PACK_ALIGN_MSB; + + + mdp4_crtc_set_config(encoder->crtc, config); mdp4_crtc_set_intf(encoder->crtc, INTF_LCDC_DTV, 0); bs_set(mdp4_lcdc_encoder, 1); -- 2.17.1