From: Lina Iyer <ilina@codeaurora.org>
To: swboyd@chromium.org, evgreen@chromium.org, marc.zyngier@arm.com
Cc: linux-kernel@vger.kernel.org, rplsssn@codeaurora.org,
linux-arm-msm@vger.kernel.org, thierry.reding@gmail.com,
bjorn.andersson@linaro.org, dianders@chromium.org,
linus.walleij@linaro.org, Thierry Reding <treding@nvidia.com>,
Lina Iyer <ilina@codeaurora.org>
Subject: [PATCH v2 1/8] gpio: Add support for hierarchical IRQ domains
Date: Thu, 24 Jan 2019 13:21:58 -0700 [thread overview]
Message-ID: <20190124202205.7940-2-ilina@codeaurora.org> (raw)
In-Reply-To: <20190124202205.7940-1-ilina@codeaurora.org>
From: Thierry Reding <treding@nvidia.com>
Hierarchical IRQ domains can be used to stack different IRQ controllers
on top of each other. One specific use-case where this can be useful is
if a power management controller has top-level controls for wakeup
interrupts. In such cases, the power management controller can be a
parent to other interrupt controllers and program additional registers
when an IRQ has its wake capability enabled or disabled.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
---
drivers/gpio/gpiolib.c | 15 +++++++++++----
include/linux/gpio/driver.h | 6 ++++++
2 files changed, 17 insertions(+), 4 deletions(-)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 1651d7f0a303..1c3ae1d3c368 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -1888,7 +1888,9 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
type = IRQ_TYPE_NONE;
}
- gpiochip->to_irq = gpiochip_to_irq;
+ if (!gpiochip->to_irq)
+ gpiochip->to_irq = gpiochip_to_irq;
+
gpiochip->irq.default_type = type;
gpiochip->irq.lock_key = lock_key;
gpiochip->irq.request_key = request_key;
@@ -1898,9 +1900,14 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip,
else
ops = &gpiochip_domain_ops;
- gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
- gpiochip->irq.first,
- ops, gpiochip);
+ if (gpiochip->irq.parent_domain)
+ gpiochip->irq.domain = irq_domain_add_hierarchy(gpiochip->irq.parent_domain,
+ 0, gpiochip->ngpio,
+ np, ops, gpiochip);
+ else
+ gpiochip->irq.domain = irq_domain_add_simple(np, gpiochip->ngpio,
+ gpiochip->irq.first,
+ ops, gpiochip);
if (!gpiochip->irq.domain)
return -EINVAL;
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 07cddbf45186..88ef196f96ec 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -48,6 +48,12 @@ struct gpio_irq_chip {
*/
const struct irq_domain_ops *domain_ops;
+ /**
+ * @parent_domain:
+ *
+ */
+ struct irq_domain *parent_domain;
+
/**
* @handler:
*
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2019-01-24 20:21 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-24 20:21 [PATCH v2 0/8] qcom: support wakeup capable GPIOs Lina Iyer
2019-01-24 20:21 ` Lina Iyer [this message]
2019-01-24 20:21 ` [PATCH v2 2/8] irqdomain: add bus token DOMAIN_BUS_WAKEUP Lina Iyer
2019-02-15 21:18 ` Stephen Boyd
2019-01-24 20:22 ` [PATCH v2 3/8] drivers: irqchip: add PDC irqdomain for wakeup capable GPIOs Lina Iyer
2019-01-24 20:22 ` [PATCH v2 4/8] dt-bindings: sdm845-pinctrl: add wakeup interrupt parent for GPIO Lina Iyer
2019-01-24 20:22 ` [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy Lina Iyer
2019-01-30 22:45 ` Stephen Boyd
2019-01-31 16:34 ` Lina Iyer
2019-01-24 20:22 ` [PATCH v2 6/8] arm64: dts: qcom: add PDC interrupt controller for SDM845 Lina Iyer
2019-01-24 20:22 ` [PATCH v2 7/8] arm64: dts: qcom: setup PDC as wakeup parent for GPIOs " Lina Iyer
2019-01-24 20:22 ` [PATCH v2 8/8] arm64: defconfig: enable PDC interrupt controller for Qualcomm SDM845 Lina Iyer
2019-01-28 14:17 ` [PATCH v2 0/8] qcom: support wakeup capable GPIOs Linus Walleij
2019-01-30 17:03 ` Lina Iyer
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