[PATCH v4 09/10] arm64: dts: qcom: setup PDC as wakeup parent for GPIOs for SDM845

Lina Iyer
2019-03-13T21:18:43Z

Setup PDC wakeup parent for TLMM for SDM845 SoC.

Signed-off-by: Lina Iyer <ilina@codeaurora.org>
---
Changes in v3:
- Provide irqdomain-map for GPIOs that map to PDC
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 78 ++++++++++++++++++++++++++++
1 file changed, 78 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index e55100c2705e..58f9f2111449 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -994,6 +994,84 @@
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
+ wakeup-parent = <&pdc_intc>;
+ irqdomain-map = <1 0 &pdc_intc 30 0>,
+ <3 0 &pdc_intc 31 0>,
+ <5 0 &pdc_intc 32 0>,
+ <10 0 &pdc_intc 33 0>,
+ <11 0 &pdc_intc 34 0>,
+ <20 0 &pdc_intc 35 0>,
+ <22 0 &pdc_intc 36 0>,
+ <24 0 &pdc_intc 37 0>,
+ <26 0 &pdc_intc 38 0>,
+ <30 0 &pdc_intc 39 0>,
+ <31 0 &pdc_intc 117 0>,
+ <32 0 &pdc_intc 41 0>,
+ <34 0 &pdc_intc 42 0>,
+ <36 0 &pdc_intc 43 0>,
+ <37 0 &pdc_intc 44 0>,
+ <38 0 &pdc_intc 45 0>,
+ <39 0 &pdc_intc 46 0>,
+ <40 0 &pdc_intc 47 0>,
+ <41 0 &pdc_intc 115 0>,
+ <43 0 &pdc_intc 49 0>,
+ <44 0 &pdc_intc 50 0>,
+ <46 0 &pdc_intc 51 0>,
+ <48 0 &pdc_intc 52 0>,
+ <49 0 &pdc_intc 118 0>,
+ <52 0 &pdc_intc 54 0>,
+ <53 0 &pdc_intc 55 0>,
+ <54 0 &pdc_intc 56 0>,
+ <56 0 &pdc_intc 57 0>,
+ <57 0 &pdc_intc 58 0>,
+ <58 0 &pdc_intc 59 0>,
+ <59 0 &pdc_intc 60 0>,
+ <60 0 &pdc_intc 61 0>,
+ <61 0 &pdc_intc 62 0>,
+ <62 0 &pdc_intc 63 0>,
+ <63 0 &pdc_intc 64 0>,
+ <64 0 &pdc_intc 65 0>,
+ <66 0 &pdc_intc 66 0>,
+ <68 0 &pdc_intc 67 0>,
+ <71 0 &pdc_intc 68 0>,
+ <73 0 &pdc_intc 69 0>,
+ <77 0 &pdc_intc 70 0>,
+ <78 0 &pdc_intc 71 0>,
+ <79 0 &pdc_intc 72 0>,
+ <80 0 &pdc_intc 73 0>,
+ <84 0 &pdc_intc 74 0>,
+ <85 0 &pdc_intc 75 0>,
+ <86 0 &pdc_intc 76 0>,
+ <88 0 &pdc_intc 77 0>,
+ <89 0 &pdc_intc 116 0>,
+ <91 0 &pdc_intc 79 0>,
+ <92 0 &pdc_intc 80 0>,
+ <95 0 &pdc_intc 81 0>,
+ <96 0 &pdc_intc 82 0>,
+ <97 0 &pdc_intc 83 0>,
+ <101 0 &pdc_intc 84 0>,
+ <103 0 &pdc_intc 85 0>,
+ <104 0 &pdc_intc 86 0>,
+ <115 0 &pdc_intc 90 0>,
+ <116 0 &pdc_intc 91 0>,
+ <117 0 &pdc_intc 92 0>,
+ <118 0 &pdc_intc 93 0>,
+ <119 0 &pdc_intc 94 0>,
+ <120 0 &pdc_intc 95 0>,
+ <121 0 &pdc_intc 96 0>,
+ <122 0 &pdc_intc 97 0>,
+ <123 0 &pdc_intc 98 0>,
+ <124 0 &pdc_intc 99 0>,
+ <125 0 &pdc_intc 100 0>,
+ <127 0 &pdc_intc 102 0>,
+ <128 0 &pdc_intc 103 0>,
+ <129 0 &pdc_intc 104 0>,
+ <130 0 &pdc_intc 105 0>,
+ <132 0 &pdc_intc 106 0>,
+ <133 0 &pdc_intc 107 0>,
+ <145 0 &pdc_intc 108 0>;
+ irqdomain-map-mask = <0xff 0>;
+ irqdomain-map-pass-thru = <0 0xff>;

qup_i2c0_default: qup-i2c0-default {
pinmux {
--
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